System bus

System bus
Example of a single system computer bus

A system bus is a single computer bus that connects the major components of a computer system. The technique was developed to reduce costs and improve modularity. It combines the functions of a data bus to carry information, an address bus to determine where it should be sent, and a control bus to determine its operation. Although popular in the 1970s and 1980s, modern computers use a variety of separate buses adapted to more specific needs.



Many early electronic computers were based on the First Draft of a Report on the EDVAC report published in 1945. In what became known as the Von Neumann architecture, a central control unit and arithmetic logic unit (ALU, which he called the central arithmetic part) were combined with computer memory and input and output functions to form a stored program computer.[1] The Report presented a general organization and theoretical model of the computer, however, not the implementation of that model.[2] Soon designs integrated the control unit and ALU into what became known as the central processing unit (CPU).

Computers in the 1950s and 1960s were generally constructed in an ad-hoc fashion. For example, the CPU, memory, and input/output units were each one or more cabinets connected by cables. Engineers used the common techniques of standardized bundles of wires and extended the concept as backplanes were used to hold printed circuit boards in these early machines. The name "bus" was already used for "bus bars" that carried electrical power to the various parts of electric machines, including early mechanical calculators.[3] The advent of integrated circuits vastly reduced the size of each computer unit, and buses became more standardized.[4] Standard modules could be interconnected in more uniform ways and were easier to develop and maintain.


To provide even more modularity with reduced cost, memory and I/O buses (and the required control and power buses) were sometimes combined into a single unified system bus.[5] Modularity and cost became important as computers became small enough to fit in a single cabinet (and customers expected similar price reductions). Digital Equipment Corporation (DEC) further reduced cost for mass-produced minicomputers, and memory-mapped I/O into the memory bus, so that the devices appeared to be memory locations. This was implemented in the Unibus of the PDP-11 around 1969, eliminating the need for a separate I/O bus.[6] Even computers such as the PDP-8 without memory-mapped I/O were soon implemented with a system bus, which allowed modules to be plugged into any slot.[7] Some authors called this a new streamlined "model" of computer architecture.[8]

Many early microcomputers (with a CPU generally on a single integrated circuit) were built with a single system bus, starting with the S-100 bus in the Altair 8800 computer system in about 1975.[9] The IBM PC used the Industry Standard Architecture (ISA) bus as its system bus in 1981. The passive backplanes of early models were replaced with the standard of putting the CPU on a motherboard, with only optional expansion boards in system bus slots.

Simple symmetric multiprocessing using a system bus

The Multibus became a standard of the Institute of Electrical and Electronics Engineers as IEEE standard 796 in 1983.[10] Sun Microsystems developed the SBus in 1989 to support smaller expansion cards.[11] The easiest way to implement symmetric multiprocessing was to plug in more that one CPU into the shared system bus, which was used through the 1980s. However, the shared bus quickly became the bottleneck and more sophisticated connection techniques were explored.[12]

As microprocessors evolved into using faster local buses and slower peripheral ones, Intel adopted the dual independent bus terminology, using the external front-side bus, and the internal back-side bus between one or more CPUs and the CPU caches. This was introduced in the Pentium Pro and Pentium II products in the mid to late 1990s.[13] Modern personal and server computers use higher-performance interconnection technologies such as HyperTransport and Intel QuickPath Interconnect, while the system bus architecture continued to be used on simpler embedded microprocessors. The systems bus can even be internal to a single integrated circuit, producing a system-on-a-chip. Examples include AMBA, CoreConnect, and Wishbone.[14]

See also


  1. ^ John von Neumann (June 30, 1945). "First Draft of a Report on the EDVAC". Retrieved May 27, 2011.  Introduction and editing by Michael D. Godfrey, Stanford University, November 1992.
  2. ^ Michael D. Godfrey (1993). "The Computer as von Neumann Planned It". IEEE Annals of the History of Computing 15 (1): 11–21. doi:10.1109/85.194088. 
  3. ^ U.S. Patent 3,470,421 "Continuous Bus Bar for Connector Plate Back Panel Machine Wiring" Donald L. Shore et al., Filed August 30, 1967, issued September 30, 1969.
  4. ^ U.S. Patent 3,462,742 "Computer System Adapted to be Constructed of Large Integrated Circuit Arrays" Henry S. Miller et al., Filed December 21, 1966, issued August 19, 1969.
  5. ^ Linda Null; Julia Lobur (2010). The essentials of computer organization and architecture (3rd ed.). Jones & Bartlett Learning. pp. 36,199–203. ISBN 9781449600068. 
  6. ^ C. Gordon Bell; R. Cady; H. McFarland; J. O'Laughlin; R. Noonan; W. Wulf (1970). "A New Architecture for Mini-Computers—The DEC PDP-11". Spring Joint Computer Conference: 657–675. 
  7. ^ Small Computer Handbook. Digital Equipment Corporation. 1973. pp. 2–9. 
  8. ^ Miles J. Murdocca; Vincent P. Heuring (2007). Computer architecture and organization: an integrated approach. John Wiley & Sons. p. 11. ISBN 9780471733881. 
  9. ^ Herbert R. Johnson. "Origins of S-100 computers". 
  10. ^ "796-1983 — IEEE Standard Microcomputer System Bus". Institute of Electrical and Electronics Engineers. 1983. Retrieved May 25, 2011. 
  11. ^ Edward H. Frank (February 26, 1990). "The SBus: Sun's high performance system bus for RISC workstations". Compcon Spring '90: Intellectual Leverage. Thirty-Fifth IEEE Computer Society International Conference: 189–194. doi:10.1109/CMPCON.1990.63672. 
  12. ^ Donald Charles Winsor (1989). Bus and Cache Memory Organizaion for Multiprocessors. University of Michigan Electrical Engineering department.  Ph.D. dissertation.
  13. ^ Todd Langley and Rob Kowalczyk (January 2009). "Introduction to Intel Architecture: The Basics". "White paper". Intel Corporation. Retrieved May 25, 2011. 
  14. ^ Rudolf Usselmann (January 9, 2001). "OpenCores SoC Bus Review". Retrieved May 30, 2011. 

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