Camera Link

Camera Link is a serial communication protocol designed for computer vision applications based on the National Semiconductor interface Channel Link. It was designed for the purpose of standardizing scientific and industrial video products including cameras, cables and frame grabbers. The standard is maintained and administered by the Automated Imaging Association or AIA, the global machine vision industry's trade group.

Transmission Protocol

The base Camera Link standard uses 28 bits to represent up to 24 bits of pixel data and 3 bits for Video Sync signals.These consist of Data Valid, Frame Valid, and Line Valid bits. The data is serialized 7:1, and the four data streams and a dedicated clock are driven over five LVDS pairs. The receiver accepts the four LVDS data streams and LVDS clock, andthen drives the 28 bits and a clock to the board. [http://www.fast-vision.com/Downloads/bgawc4510/CameraLink.pdf Microsoft Word - Ver 1_1 less B plus eps.doc ] ] The camera link standard calls for these 28 bits to be transmitted over 4 serialized
differential pairs with a serialization factor of 7. The parallel data clock is transmittedwith the data. Typically a 7x clock must be generated by a PLL or SERDES block in order to transmit or receive the serialized video. To deserialize the data,a shift register and counter may be employed. The shift register catches each of the serialized bits, one at a time, then registers the data out into the parallel clock domain - oncethe data counter has reached its terminal value.

Base Configuration

The "Base" Camera Link configuration carries signals over a single connector/cable. The cable used is a MDR ("Mini D Ribbon") 26-pin Male Plug Connector, optimized by 3M for the LVDS signal [ [http://www.alacron.com/downloads/vncl98076xz/CameraLinkSPEC.pdf Camera Link Interface Standard Specification ] ] . In addition to the 5 LVDS pairs transmitting the serialized video data (24 bits of data and 4 framing/enable signals), the connector also carries 4 LVDS discrete control signals and 2 LVDS asynchronous serial communication channels for communicating with the camera. At the maximum chipset operating frequency (85 MHz), the base configuration yields a video data throughput of 2.04 Gbit/s (255 MB/s)

Medium/Full Configuration

The Camera Link specification includes higher-bandwidth configurations that provide additional video data paths over a second connector/cable. The "Medium" configuration doubles the video bandwidth, adding an additional 24 bits of data and the same 4 framing/enable signals present in the "Base" configuration. This yields a 48-bit wide video data path capable of throughput up to 4.08 Gbit/s (510 MB/s). The "Full" configuration adds another 16-bits to the data path, resulting in a 64-bit wide video path that can carry 5.44Gbit/s (680 MB/s).

Other Extended Configurations

Some camera and data acquisition hardware manufacturers have extended the bandwidth of the interface beyond the limits imposed by the Camera Link interface specification. These formats extend the width of the "Full" configuration by reassigning some of the redundant framing/enable signals to produce a data path width of up to 80-bits, which further increases the video bandwidth. [ [http://www.mikrotron.de/pdf/mc13xxman_e.pdf MC13xx User Manual ] ]

Signal data

ee also

*List of device bandwidths
*Low-voltage differential signaling (LVDS)

External links

* [http://www.fast-vision.com/Downloads/bgawc4510/CameraLink.pdf Camera Link standard (Jan 2004)]
* [http://www.machinevisiononline.org/ Automated Imaging Association]
* [http://www.machinevisiononline.org/public/articles/articlesdetails.cfm?id=1108 List of Registered Camera Link Products]

Notes