Deterministic jitter

Deterministic jitter (or DJ) is a type of jitter with a known non-Gaussian probability distribution. The other major class of jitter is non-deterministic, or random jitter.

Characteristics

Deterministic jitter is clock timing jitter or data signal jitter that is predictable and reproducible. The peak-to-peak value of this jitter is bounded, and the bounds can easily be observed and predicted.

Deterministic Jitter includes different categories such as periodic jitter, data dependent jitter, and duty-cycle dependent jitter.

See also

• Wander

This article related to telecommunications is a stub. You can help Wikipedia by expanding it.v · Categories: Electrical parameters Synchronization Packets (information technology) Telecommunications stubs Wikimedia Foundation. 2010. Игры ⚽ Поможем написать реферат Civil War Combat General Aircraft Cygnet Look at other dictionaries: Jitter — For other meanings of this word, see Jitter (disambiguation). Jitter is the undesired deviation from true periodicity of an assumed periodic signal in electronics and telecommunications, often in relation to a reference clock source. Jitter may… …   Wikipedia Data dependent jitter — (DDJ) is a specific class of timing jitter. In particular, it is a form of deterministic jitter which is correlated with the sequence of bits in the data stream. It is also a form of ISI. Properties Depending on characteristics of the signal and… …   Wikipedia Data-dependent jitter — (DDJ) is a specific class of timing jitter. In particular, it is a form of deterministic jitter which is correlated with the sequence of bits in the data stream. It is also a form of ISI. Properties Depending on characteristics of the signal and… …   Wikipedia Jitterlyzer — infobox computer hardware generic name = Jitterlyzer caption = FS5000 invent date = 2007 invent name = FuturePlus conn1 = Host PC conn2 = PCIe x1 and x4 conn3 = SRIO via1 1 = USB via2 1 = Interposer via3 1 = MMCX connector class name = class1 =… …   Wikipedia Eye pattern — Graphical eye pattern showing an example of two power levels in an OOK modulation scheme. Constant binary 1 and 0 levels are shown, as well as transitions from 0 to 1, 1 to 0, 0 to 1 to 0, and 1 to 0 to 1. In telecommunication, an eye pattern,… …   Wikipedia JESD204 — JEDEC JESD204A (2008) is a new industry standard for the interconnection of digital to analog converter (DAC or D to A) or analog to digital converter (abbreviated ADC, A/D or A to D) and logic devices which supports the concept of multiple… …   Wikipedia DJ (disambiguation) — DJ most commonly refers to a disk jockey, a person who plays recorded music for an audience. DJ may also refer to: Contents 1 People 2 Fictional characters 3 Music 4 Other uses …   Wikipedia Ethernet Powerlink — is a deterministic real time protocol for standard Ethernet. It is an open protocol managed by the Ethernet POWERLINK Standardization Group (EPSG). It was introduced by Austrian automation company B R in 2001.This protocol has nothing to do with… …   Wikipedia SerDes — A Serializer/Deserializer (SerDes pronounced sir deez) is a pair of functional blocks commonly used in high speed communications to compensate for limited input/output. These blocks convert data between serial data and parallel interfaces in each …   Wikipedia O(1) scheduler — An O(1) scheduler is a kernel scheduling design that can schedule processes within a constant amount of time, regardless of how many processes are running on the operating system. One of the major goals of operating system designers is to… …   Wikipedia 18+ © Academic, 2000-2024 Contact us: Technical Support, Advertising Dictionaries export, created on PHP, Joomla, Drupal, WordPress, MODx. Mark and share Search through all dictionaries Translate… Search Internet Share the article and excerpts Direct link … Do a right-click on the link above and select “Copy Link”