Mike Johnson (technologist)

For other people named William Johnson, see William Johnson (disambiguation).

For other people named Michael Johnson, see Michael Johnson.

William Michael "Mike" Johnson is a technologist, and pioneer in superscalar microprocessor design in the United States.

Johnson holds bachelor's and master's degrees in electrical engineering, both from Arizona State University. Johnson was an architect and designer of early reduced instruction set computing (RISC) processors at IBM known as ROMP, in Austin, Texas.^[1] Johnson joined Advanced Micro Devices (AMD) in 1985 as the chief architect of the AMD Am29000 family (commonly known as "29K") of microprocessors.^[2] He graduated with a Ph.D. in electrical engineering from Stanford University in 1989, working with Professor Mark Horowitz.^[3][4]

He held various management and leadership positions on the AMD K5^[5] and K7 processor teams.^[6][7] He was vice president of the Advanced Architecture Labs, responsible for technology development in the areas of processor, multimedia, networking, telecommunications, and personal computer system products. He was vice president of the AMD Personal Connectivity Solutions Group in 2002.^[8] By 2004 he was a senior AMD fellow.^[9]

Later he headed Texas Instruments' Austin Microprocessor Design Center. He helped organize a 2005 conference on revitalizing computer architecture research.^[10] He served on the electrical engineering advisory council for Arizona State.^[11]

Johnson wrote a seminal book on microprocessor superscalar architecture in 1991. The first book on the subject, it was an expanded version of his dissertation, and included an appendix on applying the techniques to the Intel Corporation x86 architecture.^[5] He was quoted as saying: "The x86 really isn’t all that complex—it just doesn’t make a lot of sense."^[5]

Selected works

• Mike Johnson, Superscalar Microprocessor Design, Prentice-Hall, 1991, ISBN 0-13-875634-1
• William M. Johnson (June 1989). Super-Scalar Processor Design. Stanford University Computer Systems Laboratory. ftp://reports.stanford.edu/pub/cstr/reports/csl/tr/89/383/CSL-TR-89-383.pdf.  Technical Report No. CSL-TR-89-383
• M. D. Smith; M. Johnson; M. Horowitz (April 1989). "Limits on multiple instruction issue". 3rd International Conference on Architectural Support for Programming Languages and Operating Systems 17 (2): 290–302. doi:10.1145/70082.68209. ISBN 0-89791-300-0. 
• M. Johnson (February 26, 1990). "RISC performance pushes back: A perspective on performance limits in general-purpose applications". Thirty-Fifth IEEE Computer Society International Conference (Compcon): Intellectual Leverage 53: 241–245. doi:10.1109/CMPCON.1990.63683. ISBN 0-8186-2028-5. 
• Mike Johnson (November 1995). "RISC-like Design Fares Well for x86 CPUs". Microprocessor report: 26–27. 
• D. Draper, M. Crowley, J. Holst, G. Favor, A. Schoy, J. Trull, A. Ben-Meir, R. Khanna, D. Wendell, R. Krishna, J. Nolan, D. Mallick, H. Partovi, M. Roberts, M. Johnson, T. Lee, T. (November 1997). "Circuit techniques in a 266-MHz MMX-enabled processor". IEEE Journal of Solid-State Circuits 32 (11): 1650–1664. doi:10.1109/4.641685. ISSN 0018-9200. 

References

1. ^ "VLSI systems design". 9. CMP Publications. 1988. p. 8. http://books.google.com/books?id=ziVQAAAAYAAJ&q=mike+johnson+ibm+risc. 
2. ^ Martin Marshall (November 28, 1988). "RISC: A fringe technology or the next rage in microcomputing?". InfoWorld: p. 46. http://books.google.com/books?id=ADoEAAAAMBAJ&pg=PT45. 
3. ^ W. M. Johnson (1989). Super-Scalar Processor Design. Stanford University department of Electrical Engineering. http://portal.acm.org/citation.cfm?id=76471.  Ph.D. dissertation.
4. ^ "VLSI Research Group: People". Stanford University. http://www-vlsi.stanford.edu/people.html. Retrieved June 19, 2011. 
5. ^ ^{a b c} Michael Slater (October 24, 1994). "AMD’s K5 Designed to Outrun Pentium". Microprocessor Report (MicroDesign Resources) 8 (14). http://cgi.di.uoa.gr/~halatsis/Advanced_Comp_Arch/Papers/k5.pdf. Retrieved June 19, 2011. 
6. ^ Brooke Crothers (February 20, 1995). "Intel enters SRAM market to support P6 design". InfoWorld: p. 10. http://books.google.com/books?id=uzoEAAAAMBAJ&pg=RA1-PA10. 
7. ^ Bob Guth and Terho Uimonen (October 2, 1995). "AMD's K5 faces another delay". InfoWorld: p. 20. http://books.google.com/books?id=XDoEAAAAMBAJ&pg=PA20. 
8. ^ "AMD Opens New Offices For Personal Connectivity Solutions Group". news release (Advanced Micro Devices). August 9, 2002. http://www.amd.com/us/press-releases/Pages/Press_Release_38416.aspx. Retrieved June 19, 2011. 
9. ^ "AMD And FASL LLC Join The MIPI Alliance To Develop And Promote Open Mobile Standards". news release (Advanced Micro Devices). February 18, 2004. http://www.amd.com/us/press-releases/Pages/Press_Release_82528.aspx. Retrieved June 19, 2011. 
10. ^ "Revitalizing Computer Architecture Research". Computing Research Association. December 4, 2005. http://www.cra.org/uploads/documents/resources/rissues/computer.architecture_.pdf. Retrieved June 19, 2011. 
11. ^ "Department of Electrical Engineering". Arizona State University Ira A. Fulton School of Engineering. December 4, 2005. p. 2. http://engineering.asu.edu/sites/default/files/shared/publications/EE_AR_0506.pdf. Retrieved September 15, 2006. 

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