# Negated AND gate

Negated AND gate
 INPUT A   B OUTPUT A NAND B 0 0 1 0 1 1 1 0 1 1 1 0

The Negated AND, NO AND or NAND gate is the opposite of the digital AND gate, and behaves in a manner that corresponds to the opposite of AND gate, as shown in the truth table on the left. A LOW output results only if both the inputs to the gate are HIGH. If one or both inputs are LOW, a HIGH output results.

The NAND gate is significant because any boolean function can be implemented by using a combination of NAND gates. This property is called functional completeness.

Digital systems employing certain logic circuits take advantage of NAND's functional completeness. In complicated logical expressions, normally written in terms of other logic functions such as AND, OR, and NOT, writing these in terms of NAND saves on cost, because implementing such circuits using NAND gate yields a more compact result than the alternatives.

NAND gates can also be made with more than two inputs, yielding an output of LOW if all of the inputs are HIGH, and an output of HIGH if any of the inputs is LOW. These kinds of gates therefore operate as n-ary operators instead of a simple binary operator. Algebraically, these can be expressed as the function NAND(a, b, ..., n), which is logically equivalent to NOT(a AND b AND ... AND n).

## Symbols

There are three symbols for NAND gates: the 'distinctive' (MIL/ANSI) symbol and the 'rectangular' IEC symbol, as well as a deprecated DIN symbol sometimes found on old schematics. For more information see logic gate symbols.

 MIL/ANSI Symbol' IEC Symbol DIN Symbol

## Hardware description and pinout

NAND gates are basic logic gates, and as such they are recognised in TTL and CMOS ICs.

This schematic diagram shows the arrangement of NAND gates within a standard 4011 CMOS integrated circuit.

### CMOS version

The standard, 4000 series, CMOS IC is the 4011, which includes four independent, two-input, NAND gates.

#### Availability

These devices are available from most semiconductor manufacturers such as Fairchild Semiconductor, Philips or Texas Instruments. These are usually available in both through-hole DIL and SOIC format. Datasheets are readily available in most datasheet databases.

The standard 2-, 3-, 4- and 8-input NAND gates are available:

• CMOS
• 4011: Quad 2-input NAND gate
• 4023: Triple 3-input NAND gate
• 4012: Dual 4-input NAND gate
• 4068: Mono 8-input NAND gate
• TTL
• 7400: Quad 2-input NAND gate
• 7410: Triple 3-input NAND gate
• 7420: Dual 4-input NAND gate
• 7430: Mono 8-input NAND gate

## Implementations

The NAND gate has the property of functional completeness. That is, any other logic function (AND, OR, etc.) can be implemented using only NAND gates. An entire processor can be created using NAND gates alone. In TTL ICs using multiple-emitter transistors, it also requires fewer transistors than any other gate.

 CMOS NAND gate TTL NAND gate The physical layout of a CMOS NAND

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