Building Integrated Timing Supply

Building Integrated Timing Supply (BITS), also called Building Integrated Timing System, is a method for distributing a precision clock among telecommunications equipment. The physical medium is a T1/E1 (DS1) line.

Faster networks depend on accurate timing. As the number of bits per second increases, the time in which to look for any particular bit decreases. Getting both sides to agree on timing becomes more difficult at higher speeds. Synchronous networking is largely about distribution of accurate timing relationships.

Synchronous communications do not depend on start and stop flags to mark the beginning and end of meaningful data. Instead, the network constantly transmits data and uses a separate clock signal to determine when to examine the incoming stream to extract a bit. Distributing clock information to network nodes is one of the major challenges for synchronous network designers. Three major types of timing are used on networks: asynchronous, synchronous, and plesiochronous. All three terms derive from the Greek word kronos, meaning time. The three differ in how they distribute timing information through the network.

* Asynchronous systems do not share or exchange timing information. Each network element is timed from its own free-running clock. Analog modems are asynchronous because timing is derived from start and stop bits in the data stream. Free-running clocks are adequate for dial-up communications because the time slots are much longer than on higher-speed digital networks.

* Synchronous systems distribute timing information from an extremely accurate primary system clock. Each network element inherits its timing from the primary clock and can trace its lineage to the common shared clock. Synchronous networks may have several layers of accuracy, but the important feature is that each clock can trace timing to a single reference source.

* Plesiochronous networks are networks in which the elements are timed by separate clocks, which vary in internal timing.

Internal timing uses an internal oscillator in the CSU/DSU as the transmit clock source. No special measures are taken to ensure that the timing of transmitted pulses matches the timing of received pulses because the two operations are logically independent.

ee also

*Plesiochronous Digital Hierarchy
*Synchronous Digital Hierarchy

References

External links

* [http://www.oreilly.com/catalog/t1survival/chapter/ch05.html Excerpt from the O'Reilly book "T1: A Survival Guide"]
* [http://www.skullbox.net/bits.php Images of BITS equipment]