R4200

The R4200 is a microprocessor designed by MIPS Technologies, Inc. (MTI) that implemented the MIPS III instruction set architecture (ISA). It was also known as the VRX during development. The microprocessor was licensed to NEC, and the company fabricated and marketed it as the VR4200. The first VR4200, an 80 MHz part, was introduced in 1993. A faster 100 MHz part became available in 1994. The R4200 was developed specifically for low-power Windows NT computers such as personal computers and laptops. MTI claimed the microprocessor's integer performance was greater than that of a high-end Intel i486 and 80% of a P5-variant Pentium microprocessor. The R4200 ultimately did not see any use in personal computers and was repositioned as an embedded microprocessor that competed with the R4600. The R4300i variant was used in the widely popular Nintendo 64 video game console.

Description

The R4200 is a scalar design with a five-stage classic RISC pipeline. A notable feature is the use of the integer datapath for performing arithmetic operations on the mantissa portion of a floating point number. A separate datapath was used for the exponent. This scheme reduced cost by reducing the number of transistors, the size of the chip, and power consumption. It also impacted floating point performance negatively, but the R4200's intended applications did not require high floating point performance.

The R4200 has a 16 KB instruction cache and an 8 KB data cache. Both caches are direct-mapped. The instruction cache has a 32-byte line size, whereas the data cache has 16-byte line size. The data cache uses the write-back write protocol.

The R4200 has a 32-entry translation lookaside buffer (TLB) for data, and a 4-entry TLB for instructions. A 33-bit physical address is supported. The system bus is 64 bits wide and operates at half the internal clock frequency.

The R4200 contained 1.3 million transistors and had an area of 81 mm². NEC fabricated the R4200 in a 0.6 µm CMOS process with three levels of interconnect. It was packaged in a 179-pin ceramic pin grid array that was compatible with the R4x00PC and R4600, or a 208-pin plastic quad flat pack (PQFP). It used a 3.3 V power supply, dissipating 1.8 W typically and a maximum of 2 W at 80 MHz.

R4300i

The R4300i is a derivative of the R4200 designed by MTI for embedded applications announced on 17 April 1995.^[1] The R4300i was licensed to NEC and Toshiba, and was marketed by those companies as the VR4300 or TX4300, respectively. Both companies offered 100 and 133 MHz versions. A derivative of the VR4300 was developed by NEC for the Nintendo 64 game console. This singular use of a MIPS implementation produced significant royalties for MTI, sales for NEC, and made MIPS the highest volume 32/64-bit RISC ISA in 1997.

The R4300i differs from the R4200 by featuring an improved integer multiplier with a lower latency and a 32-bit system bus for reduced cost. The chip had an area of 45 mm² and was fabricated in a 0.35 μm process. It was packaged in a 120-pin PQFP. It uses a 3.3 V power supply and dissipates 1.8 W at 100 MHz and 2.2 W at 133 MHz.

NEC produced two derivatives of the R4300 for the general embedded market, the VR4305 and VR4310, announced on 20 January 1998.^[2] The VR4310 was available at 100, 133 or 167 MHz. It was fabricated in a 0.25 μm process and packaged in a 120-pin PQFP.

Notes

1. ^ MIPS Technologies, Inc. 1995
2. ^ NEC Corporation 1998

References

• "MIPS, NEC will launch 64-bit device". (17 April 1995). Electronic News.
• "NEC Unveils New MIPS Chip for Nintendo". (8 May 1995). Microprocessor Report.
• Gwennap, Linley (31 May 1993). "MIPS Reaches New Lows With R4200 Design". Microprocessor Report, pp. 6–9.
• Halfhill, Tom R. (July 1993). "Low-Power RISC from Mips". Byte.
• Levy, Marcus (15 September 1994). "EDN's 21st Annual Microprocessor Directory". EDN.
• MIPS Technologies, Inc. (17 April 1995). "MIPS/NEC Announce New Consumer-market RISC Processor". Press release.
• NEC Corporation (20 January 1998). "NEC Offers Two High Cost Performance 64-bit RISC Microprocessors". Press release.
• Ryan, Bob; Thompson, Tom (January 1994). "RISC Grows Up". Byte.
• Yeung, N.K. et al. (1994). "The design of a 55SPECint92 RISC processor under 2W". ISSCC Digest of Technical Papers. pp. 206–207.
• Zivkov, B.; Ferguson, B.; Gupta, M. (1994). Compcon Spring '94, Digest of Papers. pp. 18–25.

This microcomputer/microprocessor-related article is a stub. You can help Wikipedia by expanding it.v · Categories: MIPS implementations MIPS microprocessors Microcomputer stubs Wikimedia Foundation. 2010. Игры ⚽ Нужно решить контрольную? NEC Unified Solutions Northern Powergrid Look at other dictionaries: MIPS architecture — MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a RISC microprocessor architecture developed by MIPS Technologies. As of|1999|alt=By the late 1990s it was estimated that one in three RISC chips produced were …   Wikipedia Arquitectura MIPS — Saltar a navegación, búsqueda Un procesador MIPS R4400 fabricado por Toshiba MIPS, acrónimo de Microprocessor without Interlocked Pipeline Stages, es una arquitectura de procesadores tipo RISC desarrollada por MIPS Computer Systems Inc. Los… …   Wikipedia Español MIPS (procesador) — Un microprocesador MIPS R4400 fabricado por Toshiba Con el nombre de MIPS (siglas de Microprocessor without Interlocked Pipeline Stages) se conoce a toda una familia de microprocesadores de arquitectura RISC desarrollados por MIPS Technologies.… …   Wikipedia Español Hombre chipset — In 1993, Commodore International canceled the development of the AAA chipset and began to design a new 64 bit multimedia system with 3D graphics chipset including fully RISC architecture that would once again bring the Amiga back into the… …   Wikipedia Architecture MIPS — MIPS I R2000 • R3000 MIPS II R6000 MIPS III R4000 • R4200 • R4600 …   Wikipédia en Français R10000 — Architecture MIPS MIPS I R2000 • R3000 MIPS II R6000 MIPS III R4000 • R4200 • R4600 …   Wikipédia en Français Transports en commun de Montpellier — Sommaire 1 1880 1883 : les tramways à chevaux, la Compagnie Générale des Omnibus de Marseille CGOM 2 1889 1949 : les tramways électriques, la CGT 3 1949 2000 : les autobus, l …   Wikipédia en Français MIPS (архитектура) — У этого термина существуют и другие значения, см. MIPS. MIPS (англ. Microprocessor without Interlocked Pipeline Stages)  микропроцессор, разработанный компанией MIPS Computer Systems (в настоящее время MIPS Technologies) в соответствии… …   Википедия R4000 — Architecture MIPS MIPS I R2000 • R3000 MIPS II R6000 MIPS III R4000 • R4200 • R4600 …   Wikipédia en Français R4600 — Architecture MIPS MIPS I R2000 • R3000 MIPS II R6000 MIPS III R4000 • R4200 • R4600 …   Wikipédia en Français 18+ © Academic, 2000-2024 Contact us: Technical Support, Advertising Dictionaries export, created on PHP, Joomla, Drupal, WordPress, MODx. Mark and share Search through all dictionaries Translate… Search Internet Share the article and excerpts Direct link … Do a right-click on the link above and select “Copy Link”