- LatticeMico32
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LatticeMico32 Designer Lattice Semiconductor Bits 32-bit Introduced 2006 Design RISC Type Register-Register Encoding Fixed 32-bit Branching Compare and branch Endianness Big Extensions User-defined Open Yes Registers General purpose 32 LatticeMico32 is a 32-bit microprocessor soft core from Lattice Semiconductor optimized for field-programmable gate arrays (FPGAs). It uses a Harvard architecture, which means the instruction and data buses are separate. Bus arbitration logic can be used to combine the two buses, if desired.
LatticeMico32 is licensed under an open intellectual property (IP) core license. This means that the Mico32 is not restricted to Lattice FPGAs, and can be legally used on any host architecture (FPGA, ASIC, or software emulation). It is possible to embed a LatticeMico32 core into Xilinx and Altera FPGAs, in addition to the Lattice parts the LatticeMico32 was developed for.
Both the CPU core and the development toolchain are available in source-code form, allowing third-parties to implement changes to the processor architecture.
Contents
Features
- RISC load/store architecture.
- 32-bit data path.
- 32-bit fixed-size instructions (all instructions are 32 bits, including jump, call and branch instructions).
- 32 general purpose registers (R0 is typically set to zero by convention, however R0 is a standard register and other values may be assigned to it if so desired).
- Up to 32 external interrupts.
- Configurable instruction set including user defined instructions.
- Optional configurable caches (direct-mapped or 2-way set-associative, with a variety of cache sizes and arrangements).
- Optional pipelined memories.
- Dual Wishbone memory interfaces (one read-only instruction bus, one read-write data/peripheral bus).
- Memory mapped I/O.
- 6 stage pipeline.
Toolchain
- GCC - C/C++ compiler. Support for the LatticeMico32 has been added to GCC 4.5.0, but patches are available to add LatticeMico32 support to GCC 4.4.0.
- Binutils - Assembler, linker and binary utilities. Binutils has supported the LatticeMico32 since version 2.19.
- GDB - Debugger.
- Eclipse - IDE.
- Newlib - C library.
- µCos-II, uITRON, RTEMS - Real-time operating systems.
- uCLinux - O/S.
See also
External links
- Lattice's LatticeMico32 web site
- Theobroma Systems uCLinux port for LatticeMico32
- uCLinux port to the Milkymist SoC (that uses LatticeMico32)
- ERIKA Enterprise (OSEK/VDX API) porting for LatticeMico32
RISC-based processor architectures Altera Nios II · AMD 29000 · Apollo PRISM · Analog Devices Blackfin · ARM · Atmel AVR · Atmel AVR32 · Cambridge Consultants XAP · DEC Alpha · DLX · eSi-RISC · PA-RISC · Intel i960 · M32R · LatticeMico8 · LatticeMico32 · MIPS · Motorola 88000 · OpenRISC · Power ISA · S+core · SPARC · Renesas SuperH · Xilinx MicroBlaze · Xilinx Picoblaze · XMOS XCore XS1Categories:- Soft microprocessors
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