AVR32

The AVR32 is a 32-bit RISC microprocessor architecture designed by Atmel. The microprocessor architecture was designed by a handful of people educated at the Norwegian University of Science and Technology, including lead designer Øyvind Strøm, PhD and CPU architect Erik Renno, M.Sc in Atmel's Norwegian design center.

Most instructions are executed single-cycle. The MAC-unit is capable of performing a 32-bit * 16-bit + 48-bit arithmetic operation in two cycles (result latency), with an issue rate (bandwidth) of one cycle.

Any resemblance to the 8-bit AVR is only with respect to the design center (both architectures originated out of Atmel Norway, Trondheim) and some of the debug-tools.

Architecture

The AVR32 Architecture consists of several micro-architectures, most notably the AVR32A and AVR32B architectures, which describes fixed additions to the Instruction Set Architecture, configurations of the register file and the use of instruction and data-caches. [cite web | url=http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf | title=AVR32 Architecture Document | publisher=Atmel | accessdate=2008-06-15]

The AVR32 Instruction Set Architecture consists of 16-bit (compact) and 32-bit (extended) instructions, with several specialized instructions not found in architectures like MIPS32 or ARMv5 or ARMv6 ISA. Several U.S. patents are filed for the AVR32 ISA and design platform.

Just like the AVR 8-bit microcontroller architecture, the AVR32 was designed for extremely efficient code density and performance per clock cycle. Atmel used the independent benchmark consortium EEMBC to benchmark the architecture with various compilers and consistently outperformed both ARMv5 16-bit (THUMB) code and ARMv5 32-bit (ARM) code by as much as 50% on code-size and 3X on performance.

Implementations

The AVR32 architecture is solely used in Atmel's own products. Atmel launched in 2006 the first implementation of the AVR32 architecture: the AVR32 AP core, a 7-stage pipelined, cache-based design platform. [cite web | url=http://atmel.com/dyn/resources/prod_documents/doc32001.pdf | title=AVR32 AP Technical Reference Manual | publisher=Atmel | accessdate=2008-06-15] This implementation of the AVR32 architecture adds SIMD (single instruction multiple data) DSP (digital signal processing) instructions to the RISC instruction-set, in addition to Java hardware acceleration.

In 2007, Atmel launched the second implementation of the AVR32 architecture: the AVR32 UC core.The AVR32 UC core uses a three-stage pipelined Harvard architecture specially designed to optimize instruction fetches from on-chip flash memory. [cite web | url=http://atmel.com/dyn/resources/prod_documents/doc32002.pdf | title=AVR32UC Technical Reference Manual | publisher=Atmel | accessdate=2008-06-15] The AVR32 UC core shares the same instruction set architecture (ISA) as its AVR32 AP parent, with over 220 modeless instructions available as 16-bit compact and 32-bit extended instructions. The ISA features atomic bit manipulation to control on-chip peripherals and general purpose IOs and fixed point DSP arithmetic.

Devices

AP Core

* [http://www.atmel.com/dyn/products/product_card.asp?part_id=3903 AT32AP7000]
* [http://www.atmel.com/dyn/products/product_card.asp?part_id=4084 AT32AP7001]
* [http://www.atmel.com/dyn/products/product_card.asp?part_id=4085 AT32AP7002]

UC Core

* UC3A Series - "devices deliver 80 Dhrystone MIPS (DMIPS) at 66 MHz and consume 40 mA at 3.3V."
** [http://www.atmel.com/dyn/products/product_card.asp?part_id=4126 AT32UC3A0128]
** [http://www.atmel.com/dyn/products/product_card.asp?part_id=4126 AT32UC3A0256]
** [http://www.atmel.com/dyn/products/product_card.asp?part_id=4117 AT32UC3A0512]
** [http://www.atmel.com/dyn/products/product_card.asp?part_id=4124 AT32UC3A1128]
** [http://www.atmel.com/dyn/products/product_card.asp?part_id=4123 AT32UC3A1256]
** [http://www.atmel.com/dyn/products/product_card.asp?part_id=4122 AT32UC3A1512]

* UC3B Series - "deliver 72 Dhrystone MIPS (DMIPS) at 60 MHz and consume 23 mA at 3.3V."
** [http://www.atmel.com/dyn/products/product_card.asp?part_id=4174 AT32UC3B0256]
** [http://www.atmel.com/dyn/products/product_card.asp?part_id=4180 AT32UC3B0128]
** [http://www.atmel.com/dyn/products/product_card.asp?part_id=4181 AT32UC3B064]
** [http://www.atmel.com/dyn/products/product_card.asp?part_id=4176 AT32UC3B1256]
** [http://www.atmel.com/dyn/products/product_card.asp?part_id=4182 AT32UC3B1128]

Boards

* [http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918 AT32AP7000 development environment (STK1000)]
* [http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4102 AT32AP7000 Network Gateway Kit (NGW100)]
* [http://www.miromico.com/hammerhead AT32AP7000 board with FPGA, video decoder and Power over Ethernet (Hammerhead)]
* [http://www.indefia.com/products/hardware/emblinux/ AT32AP7000 Indefia Embedded Linux Board with ZigBee support]
* [http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4114 AT32UC3A Series Evaluation Kit (EVK1100)]
* [http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4175 AT32UC3B Series Evaluation Kit (EVK1101)]

References

External links

* [http://www.atmel.com/products/AVR32/ Atmel AVR32]
* [http://avr32linux.org/ AVR32 Linux Project] contains recent Linux kernel patches and GCC / binutils
* [http://www.avrfreaks.net/index.php?name=PNphpBB2&file=index&c=5 AVR Freaks] The AVR Freaks AVR32 Forums
* [http://www.freertos.org/portAVR32.html FreeRTOS.org] Free real time kernel for AVR32 flash micros
* [http://www.openembedded.org OpenEmbedded] supports cross-compilation for thousands of packages for the AVR32
* [http://www.t2-project.org/architectures/avr32.html T2 SDE] A build-system supporting the cross compilation to AVR32
* [http://www.segger.com embOS for AVR32] Operating System port for AVR32
* [http://micrium.com/atmel/AVR32.html Micrium µC/OS-II] Operating System port for AVR32
* [http://www.rtos.com/page/product.php?id=220 ThreadX RTOS for AVR32]
* [http://avr32.debian.net/ Debian AVR32 port]