- Satisfiability Modulo Theories
Satisfiability Modulo Theories (SMT) problem is a
decision problem for logical formulas with respect to combinations of background theories expressed in classicalfirst-order logic with equality. Examples of theories typically used in computer science are the theory ofreal numbers , the theory ofintegers , and the theories of variousdata structure s such as lists,array s,bit vector s and so on.Basic terminology
Formally speaking, an SMT instance is a
formula infirst-order logic , where some function and predicate symbols have additional interpretations, and SMT is the problem of determining whether such a formula is satisfiable. In other words, imagine an instance of theBoolean satisfiability problem (SAT) in which some of the binary variables are replaced bypredicates over a suitable set of non-binary variables. A predicate is basically a binary-valued function of non-binary variables. Example predicates include linear inequalities (e.g., ) or equalities involving so-called uninterpreted terms and function symbols (e.g., where is some unspecified function of two unspecified arguments.) These predicates are classified according to the theory they belong to. For instance, linear inequalities over real variables are evaluated using the rules of the theory of linear realarithmetic , whereas predicates involving uninterpreted terms and function symbols are evaluated using the rules of the theory of uninterpreted functions with equality (sometimes referred to as the empty theory [http://www.csl.sri.com/users/demoura/smt-comp/introduction.shtml] ). Other theories include the theories ofarrays and list structures (useful for modeling and verifyingsoftware program s), and the theory ofbit vectors (useful in modeling and verifyinghardware design s). Subtheories are also possible: for example, difference logic is a sub-theory of linear arithmetic in which each inequality is restricted to have the form for variables and and constant .Most SMT solvers support only quantifier free fragments of their logics.
Expressive power of SMT
An SMT instance is a generalization of a Boolean SAT instance in which various sets of variables are replaced by
predicate s from a variety of underlying theories. Obviously, SMT formulas provide a much richer modelinglanguage than is possible with Boolean SAT formulas. For example, an SMT formula allows us to model thedatapath operations of amicroprocessor at the word rather than the bit level.MT solvers
Early attempts for solving SMT instances involved translating them to Boolean SAT instances (e.g., a 32-bit integer variable would be encoded by 32 bit variables with appropriate weights and word-level operations such as 'plus' would be replaced by lower-level logic operations on the bits) and passing this formula to a Boolean SAT solver. This approach has its merits: by pre-processing the SMT formula into an equivalent Boolean SAT formula we can use existing Boolean SAT solvers "as-is" and leverage their performance and capacity improvements over time. On the other hand, the loss of the high-level semantics of the underlying theories means that the Boolean SAT solver has to work a lot harder than necessary to discover "obvious" facts (such as for integer addition.) This observation led to the development of a number of SMT solvers that tightly integrate the Boolean reasoning of a DPLL-style search with theory-specific solvers that handle conjunctions (ANDs) of predicates from a given theory.
Dubbed DPLL(T), this architecture gives the responsibility of Boolean reasoning to the DPLL-based SAT solver which, in turn, interacts with a solver for theory T through a well-defined interface. The theory solver need only worry about checking the feasibility of conjunctions of theory predicates passed on to it from the SAT solver as it explores the Boolean search space of the formula. For this integration to work well, however, the theory solver must be able to participate in propagation and conflict analysis, i.e., it must be able to infer new facts from already established facts, as well as to supply succinct explanations of infeasibility when theory conflicts arise. In other words, the theory solver must be incremental and backtrackable.
CVC (for Cooperating Validity Checker) is an automatic theorem prover for the
Satisfiability Modulo Theories problem.It was developed originally by the [http://verify.stanford.edu Stanford Verification Group] as a successor to the [http://verify.stanford.edu/SVC/ Stanford Validity Checker] , but is now maintained primarily by researchers atNew York University and theUniversity of Iowa . Its latest release is version 3.0 or CVC3. Previous releases were called CVC Lite (v2.0) and CVC (v1.0).MT for undecidable theories
Most of the common SMT approaches support decidable theories. However, many real-world systems can only be modelled by means of non-linear arithmetic over the real numbers involving
transcendental function s, e.g. an aircraft and its behavior. This fact motivates an extension of the SMT problem to non-linear theories, e.g. determine whether:
where
:
is satisfiable. Then, such problems become
undecidable in general. (It is important to note, however, that the theory ofreal closed field s, and thus the full first order theory of thereal number s, aredecidable . This is due toAlfred Tarski .)Examples of SMT solvers addressing Boolean combinations of theory atoms from undecidable arithmetic theories over the reals are ABsolver Harv|Bauer|Pister|Tautschnig|2007, which employs a classical DPLL(T) architecture with a non-linear optimization packet as (necessarily incomplete) subordinate theory solver, and HySAT-2, building on a unification of DPLL SAT-solving and interval constraint propagation called the iSAT algorithm Harv|Fränzle|Herde|Ratschan|Schubert|2007.
External links
* [http://combination.cs.uiowa.edu/smtlib/ SMT-LIB: The Satisfiability Modulo Theories Library]
* [http://www.smtcomp.org SMT-COMP: The Satisfiability Modulo Theories Competition]
* [http://www.decision-procedures.org: Decision procedures - an algorithmic point of view]MT solvers
* [http://absolver.sourceforge.net/ ABsolver]
* [http://www.lsi.upc.edu/~oliveras/bclt-main.html Barcelogic]
* [http://www.eecs.berkeley.edu/~jha/beaver.html Beaver]
* [http://fmv.jku.at/boolector/index.html Boolector]
* [http://www.cs.nyu.edu/acsys/cvc3/ CVC3]
* [http://sourceforge.net/projects/dpt The Decision Procedure Toolkit (DPT)]
* [http://ergo.lri.fr/ Ergo]
* [http://hysat.informatik.uni-oldenburg.de/ HySAT]
* [http://mathsat4.disi.unitn.it/ MathSAT]
* [http://www.cs.ubc.ca/~babic/index_spear.htm Spear]
* [http://yices.csl.sri.com/ Yices]
* [http://research.microsoft.com/projects/z3/ Z3]References
# Citation
first = A.
last = Bauer
authorlink =
first2 = M.
last2 = Pister
first3 = M.
last3 = Tautschnig
contribution = Tool-support for the analysis of hybrid systems and models
title = Proceedings of the 2007 Conference on Design, Automation and Test in Europe (DATE'07)
publisher = IEEE Computer Society
date = 2007
doi = 10.1109/DATE.2007.364411
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# Citation
first = M.
last = Fränzle
first2 = C.
last2 = Herde
first3 = S.
last3 = Ratschan
first4 = T.
last4 = Schubert
first5 = T.
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