Flow to HDL

Flow to HDL

This page is to describe tools and methods that convert Flow based system design into hardware description languages like VHDL or Verilog. Typically this is a method of creating designs for Field-programmable gate array, ASIC prototyping and DSP design. Flow based system design is well suited to FPGA design as it's easier to specify the innate parallelism of the architecture.

History

The use of flow-based design tool in engineering is a reasonably new trend, most widely used example is UML for software design. The use of flow based design tools creates in theory allows for more holistic system design and faster development. There are other tools and flow that aim to achieve the same but with C or C like languages, these are discussed in the C to HDL page.

Applications

Application currently are mainly the sort of applications that currently take too long with existing supercomputer architectures. These may include Bioinfomatics, CFD, Financial processing, Oil and Gas survey data analysis. Embedded applications that require high performance or real-time data processing is also an area of use. Also System-on-a-chip design can be done using this flow.

Examples

*Xilinx System Generator from [http://www.Xilinx.com/ Xilinx]
*StarBridge VIVA from [http://www.starbridgesystems.com/ StarBridge Systems]

External links

* [http://www.cse.clrc.ac.uk/disco/publications/FPGA_overview_2.0.pdf] an overview of flows by Daresbury Labs.
* [http://www.xilinx.com/products/design_tools/logic_design/advanced/esl/index.htm] Xilinx's ESL initiative, some products listed and C to VHDL tools.


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