C to HDL

A number of vendors have attempted to create tools that convert C or C-like languages into a hardware description language like VHDL or Verilog. They can then be run on Field-programmable gate array. The motivation for this is that writing in a hardware description language can be tedious and time consuming.

C to RTL is another name for this methodology. RTL refers to the Register transfer level representation of a program necessary to implement it in logic.

There are other tools and flow that aim to achieve the same but with flow rather than C based design, these are discussed in the Flow to HDL page.

History

Early development on C to HDL was done by Ian Page and colleagues at Oxford University in the 90s. They commercialized their research by forming Celoxica in 1999. In 2008 Celoxica was [http://www.eetimes.com/news/semi/rss/showArticle.jhtml?articleID=205208538&cid=RSSfeed_eetimes_semiRSS sold to Catalytic] for $3 million.

Applications

C to HDL techniques are most commonly applied to applications that have unacceptably high execution times on existing general-purpose supercomputer architectures. Examples include bioinfomatics, CFD, financial processing, and oil and gas survey data analysis. Embedded applications requiring high performance or real-time data processing are also an area of use. System-on-a-chip design may also take advantage of C to HDL techniques.

C-to-VHDL compilers are very useful for large designs or for implementing code that might change in the future. Designing a large application entirely in HDL may be very difficult and time-consuming; the abstraction of a high level language for such a large application will often reduce total development time. Furthermore, an application coded in HDL will almost certainly be more difficult to modify than one coded in a higher level language. If the designer needs to add new functionality to the application, adding a few lines of C code will almost always be easier than remodelling the equivalent HDL code.

Tool Examples and their Vendors

*C-to-Verilog tool (NISC) from University of California, Irvine
* [http://www.altium.com/Products/AltiumDesigner/ Altium Designer 6.9 and 7.0] (a.k.a. Summer 08) from Altium
*CatapultC tool from Mentor Graphics
*Cynthesizer from Forte Design Systems
*SystemC from [http://www.celoxica.com/ Celoxica]
*Handel-C from [http://www.celoxica.com/ Celoxica]
*DIME-C from Nallatech
*Impulse C from [http://www.impulsec.com/ Impulse Accelerated Technologies]
*FpgaC which is an open source initiative
*SA-C programming language
*Cascade from [http://www.criticalblue.com Critical Blue]
*Mitrion-C from Mitrionics
*C2R Compiler from [http://www.cebatech.com/ Cebatech]
*Mimosys Clarity from [http://www.mimosys.com Mimosys]
* [http://wiki.ittc.ku.edu/hybridthread/HybridThreads_Compiler Hthreads Compiler] (based on GCC) from the University of Kansas

External links

* [http://www.ddj.com/dept/cpp/197004413] a good article on Dr Dobbs Journal about ImpulseC.
* [http://www.cse.clrc.ac.uk/disco/publications/FPGA_overview_2.0.pdf] an overview of flows by Daresbury Labs.
* [http://web.comlab.ox.ac.uk/oucl/work/christian.peter/overview_handelc.html] an Overview of Hardware Compilation and the Handel-C language.
* [http://www.xilinx.com/products/design_tools/logic_design/advanced/esl/index.htm] Xilinx's ESL initiative, some products listed and C to VHDL tools.
* [http://www.altium.com/Evaluate/DEMOcenter/#,11,0,1,3] Altium's C-to-Hardware Compiler overview.