Current mirror

A current mirror is a circuit designed to copy a current through one active device by controlling the current in another active device of a circuit, keeping the output current constant regardless of loading. The current being 'copied' can be, and sometimes is, a varying signal current. Conceptually, an ideal current mirror is simply an ideal inverting current amplifier that reverses the current direction as well or it is a current-controlled current source (CCCS). The current mirror is used to provide bias currents and active loads to circuits.

Mirror characteristics

There are three main specifications that characterize a current mirror. The first is the transfer ratio (in the case of a current amplifier) or the output current magnitude (in the case of a constant current source CCS). The second is its AC output resistance, which determines how much the output current varies with the voltage applied to the mirror. The third specification is the minimum voltage drop across the output part of the mirror necessary to make it work properly. This minimum voltage is dictated by the need to keep the output transistor of the mirror in active mode. The range of voltages where the mirror works is called the compliance range and the voltage marking the boundary between good and bad behavior is called the compliance voltage. There are also a number of secondary performance issues with mirrors, for example, temperature stability.

Practical approximations

For small-signal analysis the current mirror can be approximated by its equivalent Norton impedance .

In large-signal hand analysis, a current mirror is usually and simply approximated by an ideal current source. However, an ideal current source is unrealistic in several respects:

• it has infinite AC impedance, while a practical mirror has finite impedance
• it provides the same current regardless of voltage, that is, there are no compliance range requirements
• it has no frequency limitations, while a real mirror has limitations due to the parasitic capacitances of the transistors
• the ideal source has no sensitivity to real-world effects like noise, power-supply voltage variations and component tolerances.

Circuit realizations of current mirrors

Basic idea

A current mirror consists of two cascaded inverse converters with mirrored transfer characteristic.

A bipolar transistor can be used as the simplest current-to-current converter but its transfer ratio would highly depend on temperature variations, β tolerances, etc. To eliminate these undesired disturbances, a current mirror is composed of two cascaded current-to-voltage and voltage-to-current converters placed at the same conditions and having reverse characteristics. They have not to be obligatory linear; the only requirement is their characteristics to be mirrorlike (for example, in the BJT current mirror below, they are logarithmic and exponential). Usually, two identical converters are used but the characteristic of the first one is reversed by applying a negative feedback. Thus a current mirror consists of two cascaded equal converters (the first - reversed and the second - direct).

Figure 1: A current mirror implemented with npn bipolar transistors using a resistor to set the reference current I_REF; V_CC = supply voltage

Basic BJT current mirror

If a voltage is applied to the BJT base-emitter junction as an input quantity and the collector current is taken as an output quantity, the transistor will act as an exponential voltage-to-current converter. By applying a negative feedback (simply joining the base and collector) the transistor can be "reversed" and it will begin acting as the opposite logarithmic current-to-voltage converter; now it will adjust the "output" base-emitter voltage so as to pass the applied "input" collector current.

The simplest bipolar current mirror (shown in Figure 1) implements this idea. It consists of two cascaded transistor stages acting accordingly as a reversed and direct voltage-to-current converters. Transistor Q₁ is connected to ground. Its collector-base voltage is zero as shown. Consequently, the voltage drop across Q₁ is V_BE, that is, this voltage is set by the diode law and Q₁ is said to be diode connected. (See also Ebers-Moll model.) It is important to have Q₁ in the circuit instead of a simple diode, because Q₁ sets V_BE for transistor Q₂. If Q₁ and Q₂ are matched, that is, have substantially the same device properties, and if the mirror output voltage is chosen so the collector-base voltage of Q₂ is also zero, then the V_BE-value set by Q₁ results in an emitter current in the matched Q₂ that is the same as the emitter current in Q₁. Because Q₁ and Q₂ are matched, their β₀-values also agree, making the mirror output current the same as the collector current of Q₁. The current delivered by the mirror for arbitrary collector-base reverse bias V_CB of the output transistor is given by (see bipolar transistor):

$I_\mathrm{C} = I_\mathrm{S} \left( e^{\frac{V_\mathrm{BE}}{V_\mathrm{T}}}-1 \right) \left(1 + \begin{matrix} \frac{V_\mathrm{CB}}{V_\mathrm{A}} \end{matrix} \right)$,

where I_S = reverse saturation current or scale current, V_T = thermal voltage and V_A = Early voltage. This current is related to the reference current I_REF when the output transistor V_CB = 0 V by:

$I_{REF} = I_C \left( 1+ \frac {2} {\beta_0} \right) \ ,$

as found using Kirchhoff's current law at the collector node of Q₁:

I_REF = I_C + I_B1 + I_B2.

The reference current supplies the collector current to Q₁ and the base currents to both transistors — when both transistors have zero base-collector bias, the two base currents are equal, I_B1=I_B2=I_B.

$I_{REF} = I_C + I_B + I_B = I_C + 2 I_B = I_C \left(1+ \frac {2} {\beta_0} \right) \ ,$

Parameter β₀ is the transistor β-value for V_CB = 0 V.

Output resistance

If V_CB is greater than zero in output transistor Q₂, the collector current in Q₂ will be somewhat larger than for Q₁ due to the Early effect. In other words, the mirror has a finite output (or Norton) resistance given by the r_O of the output transistor, namely (see Early effect):

$R_N =r_O = \begin{matrix} \frac {V_A + V_{CB}} {I_C} \end{matrix}$,

where V_A = Early voltage and V_CB = collector-to-base bias.

Compliance voltage

To keep the output transistor active, V_CB ≥ 0 V. That means the lowest output voltage that results in correct mirror behavior, the compliance voltage, is V_OUT = V_CV = V_BE under bias conditions with the output transistor at the output current level I_C and with V_CB = 0 V or, inverting the I-V relation above:

$\ V_{CV}= {V_T}$ $\ \mathrm {ln}$ $\left(\begin{matrix}\frac {I_C}{I_S}\end{matrix}+1\right) \ ,$

where V_T = thermal voltage and I_S = reverse saturation current or scale current.

Extensions and complications

When Q₂ has V_CB > 0 V, the transistors no longer are matched. In particular, their β-values differ due to the Early effect, with

${\beta}_1 = {\beta}_{0} \ \operatorname{and} \ {\beta}_2 = {\beta}_{0}\ (1 + \frac{V_{CB}}{V_A})$

where V_A is the Early voltage and β₀ = transistor β for V_CB = 0 V. Besides the difference due to the Early effect, the transistor β-values will differ because the β₀-values depend on current, and the two transistors now carry different currents (see Gummel-Poon model).

Further, Q₂ may get substantially hotter than Q₁ due to the associated higher power dissipation. To maintain matching, the temperature of the transistors must be nearly the same. In integrated circuits and transistor arrays where both transistors are on the same die, this is easy to achieve. But if the two transistors are widely separated, the precision of the current mirror is compromised.

Additional matched transistors can be connected to the same base and will supply the same collector current. In other words, the right half of the circuit can be duplicated several times with various resistor values replacing R₂ on each. Note, however, that each additional right-half transistor "steals" a bit of collector current from Q₁ due to the non-zero base currents of the right-half transistors. This will result in a small reduction in the programmed current.

An example of a mirror with emitter degeneration to increase mirror resistance is found in two-port networks.

For the simple mirror shown in the diagram, typical values of β will yield a current match of 1% or better.

Figure 2: An n-channel MOSFET current mirror with a resistor to set the reference current I_REF; V_DD is the supply voltage

Basic MOSFET current mirror

The basic current mirror can also be implemented using MOSFET transistors, as shown in Figure 2. Transistor M₁ is operating in the saturation or active mode, and so is M₂. In this setup, the output current I_OUT is directly related to I_REF, as discussed next.

The drain current of a MOSFET I_D is a function of both the gate-source voltage and the drain-to-gate voltage of the MOSFET given by I_D = f (V_GS, V_DG), a relationship derived from the functionality of the MOSFET device. In the case of transistor M₁ of the mirror, I_D = I_REF. Reference current I_REF is a known current, and can be provided by a resistor as shown, or by a "threshold-referenced" or "self-biased" current source to ensure that it is constant, independent of voltage supply variations.^[1]

Using V_DG=0 for transistor M₁, the drain current in M₁ is I_D = f (V_GS,V_DG=0), so we find: f (V_GS, 0) = I_REF, implicitly determining the value of V_GS. Thus I_REF sets the value of V_GS. The circuit in the diagram forces the same V_GS to apply to transistor M₂. If M₂ is also biased with zero V_DG and provided transistors M₁ and M₂ have good matching of their properties, such as channel length, width, threshold voltage etc., the relationship I_OUT = f (V_GS,V_DG=0 ) applies, thus setting I_OUT = I_REF; that is, the output current is the same as the reference current when V_DG=0 for the output transistor, and both transistors are matched.

The drain-to-source voltage can be expressed as V_DS=V_DG +V_GS. With this substitution, the Shichman-Hodges model provides an approximate form for function f (V_GS,V_DG):^[2]

$\begin{alignat}{2} I_{d} & = f\ (V_{GS},V_{DG}) = \begin{matrix} \frac{1}{2}K_{p}\left(\frac{W}{L}\right)\end{matrix}(V_{GS} - V_{th})^2 (1 + \lambda V_{DS}) \\ & =\begin{matrix} \frac{1}{2}K_{p}\left(\frac{W}{L}\right)\end{matrix}(V_{GS} - V_{th})^2 \left( 1 + \lambda (V_{DG}+V_{GS}) \right) \\ \end{alignat}$

where, K_p is a technology related constant associated with the transistor, W/L is the width to length ratio of the transistor, V_GS is the gate-source voltage, V_th is the threshold voltage, λ is the channel length modulation constant, and V_DS is the drain source voltage.

Output resistance

Because of channel-length modulation, the mirror has a finite output (or Norton) resistance given by the r_o of the output transistor, namely (see channel length modulation):

$R_N =r_o = \begin{matrix} \frac {1/\lambda + V_{DS}} {I_D} \end{matrix} = \begin{matrix} \frac {V_{A} + V_{DS}} {I_D} \end{matrix}$,

where λ = channel-length modulation parameter and V_DS = drain-to-source bias.

Compliance voltage

To keep the output transistor resistance high, V_DG ≥ 0 V.^{[nb 1]} (see Baker).^[3] That means the lowest output voltage that results in correct mirror behavior, the compliance voltage, is V_OUT = V_CV = V_GS for the output transistor at the output current level with V_DG = 0 V, or using the inverse of the f-function, f⁻¹:

$V_{CV}= V_{GS} (\mathrm{for}\ I_D\ \mathrm{at} \ V_{DG}=0V) = f ^{-1} (I_D) \ \mathrm{with}\ V_{DG}=0$.

For Shichman-Hodges model, f ^-1 is approximately a square-root function.

Extensions and reservations

A useful feature of this mirror is the linear dependence of f upon device width W, a proportionality approximately satisfied even for models more accurate than the Shichman-Hodges model. Thus, by adjusting the ratio of widths of the two transistors, multiples of the reference current can be generated.

It must be recognized that the Shichman-Hodges model^[4] is accurate only for rather dated technology, although it often is used simply for convenience even today. Any quantitative design based upon new technology uses computer models for the devices that account for the changed current-voltage characteristics. Among the differences that must be accounted for in an accurate design is the failure of the square law in V_gs for voltage dependence and the very poor modeling of V_ds drain voltage dependence provided by λV_ds. Another failure of the equations that proves very significant is the inaccurate dependence upon the channel length L. A significant source of L-dependence stems from λ, as noted by Gray and Meyer, who also note that λ usually must be taken from experimental data.^[5]

Feedback assisted current mirror

Figure 3: Gain-boosted current mirror with op amp feedback to increase output resistance

Figure 4: MOSFET version of wide-swing current mirror; M₁ and M₂ are in active mode, while M₃ and M₄ are in Ohmic mode and act like resistors

Figure 3 shows a mirror using negative feedback to increase output resistance. Because of the op amp, these circuits are sometimes called gain-boosted current mirrors. Because they have relatively low compliance voltages, they also are called wide-swing current mirrors. A variety of circuits based upon this idea are in use,^[6][7][8] particularly for MOSFET mirrors because MOSFETs have rather low intrinsic output resistance values. A MOSFET version of Figure 3 is shown in Figure 4 where MOSFETs M₃ and M₄ operate in Ohmic mode to play the same role as emitter resistors R_E in Figure 3, and MOSFETs M₁ and M₂ operate in active mode in the same roles as mirror transistors Q₁ and Q₂ in Figure 3. An explanation follows of how the circuit in Figure 3 works.

The operational amplifier is fed the difference in voltages V₁ - V₂ at the top of the two emitter-leg resistors of value R_E. This difference is amplified by the op amp and fed to the base of output transistor Q₂. If the collector base reverse bias on Q₂ is increased by increasing the applied voltage V_A, the current in Q₂ increases, increasing V₂ and decreasing the difference V₁ - V₂ entering the op amp. Consequently, the base voltage of Q₂ is decreased, and V_BE of Q₂ decreases, counteracting the increase in output current.

If the op amp gain A_v is large, only a very small difference V₁ - V₂ is sufficient to generate the needed base voltage V_B for Q₂, namely

$V_1-V_2 = \frac {V_B}{A_v} \ .$

Consequently, the currents in the two leg resistors are held nearly the same, and the output current of the mirror is very nearly the same as the collector current I_C1 in Q₁, which in turn is set by the reference current as

$I_{ref} = I_{C1} (1 + 1/ { \beta}_1) \ ,$

where β₁ for transistor Q₁ and β₂ for Q₂ differ due to the Early effect if the reverse bias across the collector-base of Q₂ is non-zero.

Figure 5: Small-signal circuit to determine output resistance of mirror; transistor Q₂ is replaced with its hybrid-pi model; a test current I_X at the output generates a voltage V_X, and the output resistance is R_out = V_X / I_X.

Output resistance

An idealized treatment of output resistance is given in the footnote.^{[nb 2]} A small-signal analysis for an op amp with finite gain A_v but otherwise ideal is based upon Figure 5 (β, r_O and r_π refer to Q₂). To arrive at Figure 5, notice that the positive input of the op amp in Figure 3 is at AC ground, so the voltage input to the op amp is simply the AC emitter voltage V_e applied to its negative input, resulting in a voltage output of −A_v V_e. Using Ohm's law across the input resistance r_π determines the small-signal base current I_b as:

$I_b = \frac {V_e} {r_{\pi} / ( A_v+1) } \ .$

Combining this result with Ohm's law for R_E, V_e can be eliminated, to find:^{[nb 3]}

$I_b = I_X \frac {R_E} {R_E +\frac {r_{\pi}} {A_v+1} } \ .$

Kirchhoff's voltage law from the test source I_X to the ground of R_E provides:

$V_X = (I_X + \beta I_b) r_O + (I_X - I_b )R_E \ .$

Substituting for I_b and collecting terms the output resistance R_out is found to be:

$R_{out} = \frac {V_X} {I_X} = r_O \left( 1+ \beta \frac{R_E} {R_E+r_{\pi}/(A_v+1)} \right) +R_E\|\frac {r_{\pi}} {A_v+1} \ .$

For a large gain A_v >> r_π / R_E the maximum output resistance obtained with this circuit is

$R_{out} = ( \beta +1) r_O \ ,$

a substantial improvement over the basic mirror where R_out = r_O.

The small-signal analysis of the MOSFET circuit of Figure 4 is obtained from the bipolar analysis by setting β = g_m r_π in the formula for R_out and then letting r_π → ∞. The result is

$R_{out} = r_O \left( 1+ g_m R_E(A_v+1) \right) +R_E \ .$

This time, R_E is the resistance of the source-leg MOSFETs M₃, M₄. Unlike Figure 3, however, as A_v is increased (holding R_E fixed in value), R_out continues to increase, and does not approach a limiting value at large A_v.

Compliance voltage

For Figure 3, a large op amp gain achieves the maximum R_out with only a small R_E. A low value for R_E means V₂ also is small, allowing a low compliance voltage for this mirror, only a voltage V₂ larger than the compliance voltage of the simple bipolar mirror. For this reason this type of mirror also is called a wide-swing current mirror, because it allows the output voltage to swing low compared to other types of mirror that achieve a large R_out only at the expense of large compliance voltages.

With the MOSFET circuit of Figure 4, like the circuit in Figure 3, the larger the op amp gain A_v, the smaller R_E can be made at a given R_out, and the lower the compliance voltage of the mirror.

Other current mirrors

There are many sophisticated current mirrors that have higher output resistances than the basic mirror (more closely approach an ideal mirror with current output independent of output voltage) and produce currents less sensitive to temperature and device parameter variations and to circuit voltage fluctuations. These multi-transistor mirror circuits are used both with bipolar and MOS transistors. These circuits include:

• the Widlar current source
• the Wilson current source
• the Cascoded current sources

Notes

1. ^ Keeping the output resistance high means more than keeping the MOSFET in active mode, because the output resistance of real MOSFETs only begins to increase on entry into the active region, then rising to become close to maximum value only when V_DG ≥ 0 V.
2. ^ An idealized version of the argument in the text, valid for infinite op amp gain, is as follows. If the op amp is replaced by a nullor, voltage V₂ = V₁, so the currents in the leg resistors are held at the same value. That means the emitter currents of the transistors are the same. If the V_CB of Q₂ increases, so does the output transistor β because of the Early effect: β = β₀ ( 1 + V_CB / V_A ). Consequently the base current to Q₂ given by I_B = I_E / (β + 1) decreases and the output current I_out = I_E / (1 + 1 / β) increases slightly because β increases slightly. Doing the math,

   $\frac {1} {R_{out}} = \frac {\partial I_{out} } { \partial V_{CB} } = I_E \frac {\partial } { \partial V_{CB} } \left( \frac { \beta } { \beta +1} \right) = I_E \frac {1} {(\beta + 1)^2 } \frac { \partial \beta } {\partial V_{CB}}$   $= \frac {\beta I_E} { \beta +1 } \frac {1}{\beta} \frac {\beta_0} { V_A} \frac {1} {(\beta +1) } =I_{out} \frac {1} {1+V_{CB} / V_A} \frac {1} { V_A} \frac {1} {(\beta +1) } = \frac {1} { ( \beta +1 ) r_0} \ ,$

   where the transistor output resistance is given by r_O = ( V_A + V_CB ) / I_out. That is, the ideal mirror resistance for the circuit using an ideal op amp nullor is R_out = ( β + 1 ) r_O, in agreement with the value given later in the text when the gain → ∞.
3. ^ Notice that as A_v → ∞, V_e → 0 and I_b → I_X.

See also

• Current source
• Widlar current source
• Wilson current source
• Bipolar junction transistor
• MOSFET
• Channel length modulation
• Early effect
• {{nmos current mirror{}

References

1. ^ Paul R. Gray, Paul J. Hurst, Stephen H. Lewis, Robert G. Meyer (2001). Analysis and Design of Analog Integrated Circuits (Fourth Edition ed.). New York: Wiley. p. 308–309. ISBN 0471321680. 
2. ^ Gray et al.. Eq. 1.165, p. 44. ISBN 0471321680. 
3. ^ R. Jacob Baker (2010). CMOS Circuit Design, Layout and Simulation (Third ed.). New York: Wiley-IEEE. pp. 297, §9.2.1 and Figure 20.28, p. 636. ISBN 978-0-470-88132-3. 
4. ^ NanoDotTek Report NDT14-08-2007, 12 August 2007
5. ^ Gray et al.. p. 44. ISBN 0471321680. 
6. ^ R. Jacob Baker. § 20.2.4 pp. 645–646. ISBN 978-0-470-88132-3. 
7. ^ Ivanov VI and Filanovksy IM (2004). Operational amplifier speed and accuracy improvement: analog circuit design with structural methodology (The Kluwer international series in engineering and computer science, v. 763 ed.). Boston, Mass.: Kluwer Academic. p. §6.1, p. 105–108. ISBN 1-4020-7772-6. http://books.google.com/books?id=IuLsny9wKIIC&pg=PA110&dq=gain+boost+wide++%22current+mirror%22#PPA107,M1. 
8. ^ W. M. C. Sansen (2006). Analog design essentials. New York ; Berlin: Springer. p. §0310, p. 93. ISBN 0-387-25746-2. 

External links

• Patent (1968) by RJ Widlar: Biasing scheme especially suited for integrated circuits
• Current mirrors
• 4QD tec - Current sources and mirrors Compendium of circuits and descriptions