AMBA specification

The Advanced Microcontroller Bus Architecture was introduced in 1996 and is widely used as the on-chip bus for ARM processors. The first AMBA buses were Advanced System Bus (ASB) and Advanced Peripheral Bus (APB). In its 2nd version, ARM introduced AHB that is a single clock-edge protocol. This protocol is today a de-facto standard for 32-bit embedded processors because it is well documented and can be used without royalties. In 2003, ARM introduced the 3rd generation of AMBA including AXI high-performance interconnect. Some manufacturers utilize AMBA buses for non-ARM designs. As an example Infineon uses an AMBA bus for the ADM5120 SoC based on the MIPS architecture.

AMBA is designed for use in System-on-a-chip (SoC) designs. The important aspect of a SoC is not only which components or blocks it houses, but also how they are interconnected. AMBA is a solution for the blocks to interface with each other.

The [http://www.arm.com/products/solutions/AMBA_Spec.html AMBA 2.0 specification] and [http://www.arm.com/products/solutions/axi_spec.html AMBA 3 AXI specification] define four buses/interfaces:

*Advanced eXtensible Interface (AXI)
*Advanced High-performance Bus (AHB)
*Advanced System Bus (ASB)
*Advanced Peripheral Bus (APB)

The timing aspects and the voltage levels on the bus are not dictated by the specifications.

The objective of the AMBA specification is to

*be technology independent,
*enhance design reusability using IP cores,
*encourage modular system design to improve processor independence,
*minimalize silicon infrastructure.

PrimeCell

The [http://www.arm.com/products/solutions/PrimeCellPeripherals.html PrimeCell Peripherals] are AMBA bus-compliant, synthesizable intellectual property (IP) cores developed by ARM for SoC integration. The PrimeCell Peripherals family includes UARTs (PL010, PL011), SDRAM and FLASH memory controllers (PL172), DMA engines etc.

Competitors

* Opencores Wishbone bus - Free and open bus architecture (formerly from Silica)
* [http://www.sonicsinc.com/ Sonics] Silicon Backplane
* IBM CoreConnect bus technology, used in Power systems, but also in many other SoCs like systems with the Xilinx MicroBlaze or similar cores
* IDT IPBus
* Altera Avalon - proprietary bus system for Alteras Nios II-SoCs

See also

* Functional specification