- AN/FSQ-31V
The AN/FSQ-31V was a
computer made byIBM (International Business Machines) in 1960 and 1961 for the United States Air ForceStrategic Air Command (SAC). Three Q-31 units were built. They were used as the Data Processing Center (DPC) portion of theSAC Automated Command and Control System [cite web
last = Wohlman
first = John
authorlink =
coauthors =
year = 1968
url = http://www.airpower.maxwell.af.mil/airchronicles/aureview/1968/jan-feb/wohlman.html
title = Computer-Generated Map Data
subtitle = An Aid to Command and Control
format =
work =
publisher = Air University Review
accessdate = June 20
accessyear = 2006]Locations
Two (DPC 1 and DPC 2) were installed at SAC headquarters (Bldg 500) at
Offutt Air Force Base outsideOmaha, Nebraska . One (DPC 3) was installed in the Headquarters 15th Air Force Combat Operations Center atMarch Air Force Base , nearRiverside, California . Another machine, designated theAN/FSQ-32 , was installed atSystem Development Corporation (SDC) headquarters, Santa Monica, California and was used as a development machine for the compiler and operational software for the Q-31s.Architecture
The system was divided into functional sections::#
Central Processing Unit :# Memory:# High-Speed Input/Output:# Low-Speed Input/Output:# Operations ConsoleCentral Processing Unit
Memory was addressed by words, which were 48
bit s long. Each half word (24 bits) had a parity bit, for a total storage size of 50 bits. Depending on addressing mode, each word could be viewed as either 1 48-bit word, 2-24 bit half-words, 6 8-bit characters (EBCDIC encoded) or 8 6-bit bytes. A 6-bit byte, as opposed to the 8-bitbyte in common use today, was common in IBM and other scientific computers of the time. The address space provided a maximum of 256K words.The ISA was rather complicated for its time. The instructions were a fixed length of one word providing 24 bits for the operation and 24 bits for the address. The address consisted of 18 bits (3 bytes) for the memory address, with other bits used for the specification of index registers and indirect addressing.
The operation field provided the operation code and a variety of modifiers. Some modifiers allowed instructions to operate only on specific bytes of a word or on specific bits of a byte without separate masking operations. Other modifiers allowed the single 48-bit ALU to operate on a pair of 24-bit operands to facilitate vector operations.
Other parts of the CPU were some sense switches, which could be used to control various software functions, the run/halt switch, and a switch, amplifier, and speaker assembly, which could be used to provide audio feedback or even play music, byconnecting one of four bits in the main accumulator which could then be toggled under software control at an appropriate rate to produce whatever tones one wanted. Someone in the software development division had produced a card deck on which was stored an executive that allowed selecting from a whole list of songs, including Christmas Carols, by setting the sense switches to a particular code, which would be printed out on the I/O Typewriter if a certain sense switch was on when the program was started.
Memory
The Q-31s were equipped with four 16 kiloword memory banks. The memory bank was oil and water cooled. Also considered as part of the memory subsystem in that they were addressed via fixed reserved memory addresses, were four 48 position switch banks, in which a short program could be inserted, and a plug panel, similar to the one used in
IBM Unit-Record equipment, that had the capacity of 32word s, so longerbootstrap or diagnostic programs could be installed in plug panels which could then be inserted into the receptacle and used. This served as a primitive ROM.High-Speed Input/Output
The High-Speed I/O section provided interfaces to the Drum Memory system, which consisted of a control system, and two vertical drum memory devices. Each drum read and wrote 50 bits at a time in parallel so transferring data could be done quickly. The drums were organized as 17 fields with 8192 words per field for a total capacity of 139264 words. The motors that rotated the drums required 208 VAC at 45 Hz so a motor generator unit was required to change the frequency from 60 Hz. This added to the noise level in the computer room. The other connection to/from the HSIO was to the
SACCS EDTCC , which then interfaced to the rest of the SACCS system.Low-Speed Input/Output
The Low-Speed I/O section interfaced to several different devices::* Tape Controllers 1 and 2, connected to 16
IBM 729 -V Tape Drives:* Disk File Controller, which was a modified Tape Controller, connected to the:** Bryant Disk File, which had 25 disks that were 39inch es in diameter, 125 read/write heads that were hydraulically actuated, and had a total capacity of 26 MB:*IBM 1401 , which controlled data transfers from unit-record equipment::**IBM 1402 Card Reader/Punch:**IBM 1403 Line Printer:** 2IBM 729 -V Tape Drives:* 2IBM Selectric Typewriters, (I/O Typewriters) one of which was used for operational messages and the other for diagnostic messages and maintenance activities.References
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