NetFPGA

The NetFPGA Project refers to an effort to develop an open source hardware and software platform for enabling rapid prototyping of networking devices. The project primarily targets academic researchers, industry users, and also students in the classroom. While not the first platform of its kind in the networking community ^[1][2][3][4], NetFPGA sets itself apart in primarily two ways. First is in its FPGA-based approach to prototyping networking devices. This allows users to develop designs that are able to process packets at line-rate, a capability generally unafforded by software based approaches. NetFPGA's second distinguishing characteristic is its focus on supporting a community of open source hardware and software developers that can share and build on each other's projects and IP building blocks.

History

The project began in 2007 as a research project at Stanford University with what was called the NetFPGA-1G. "The 1G", as it is known colloquially, was originally designed as a tool for education to teach students about networking hardware architecture and design^[5]. The 1G platform consisted of a PCI board with a Xilinx Virtex-II pro FPGA and 4 x 1GigE interfaces feeding into it, along with a downloadable code repository containing an IP library and a few example designs. The project steadily grew and by the end of 2010 more than 1,800 1G boards had been sold to over 150 educational institutions spanning 15 countries ^[6]. During that growth the 1G not only gained popularity as a tool for education, but increasingly as a tool for research. By 2011 over 46 academic papers had been published regarding research that used the NetFPGA-1G platform ^[7]. Additionally, over 40 projects have been contributed back and been included in the 1G code repository as of year end 2010.

Current Status

In 2009 work began in secrecy on the next generation of the NetFPGA platform, dubbed the NetFPGA-10G, or “10G” for short, emphasizing its 4 x 10 GigE interfaces. The 10G board was also designed with a much larger FPGA, more memory, and a number of other upgrades. The first release of the platform, codenamed “Howth”, is set to launch on December 24th, 2010, and includes a repository similar to that of the 1G, containing a small IP library and two reference designs.

From a platform design perspective, the 10G is diverging in a few significant ways from the 1G platform. For instance, the interface standards for hardware IP were completely redesigned, relying on industry standards rather than homegrown protocols. Additionally the platform relies more heavily now on industry standard tools for dealing with design composition, automated register mapping, and managing the IP library, rather than custom scripts.

The second release of the NetFPGA-10G platform is codenamed “Skellig” and is scheduled for release before second quarter 2011.

NetFPGA-1G

Board Features

• Xilinx Virtex-II Pro 50
• 4 One Gigabit interfaces (RJ45 connectors)
• 4.5 Megabytes SRAM
• 64 Megabytes DDR2 DRAM
• 2 SATA-style connectors to Multi-gigabit I/O
• Standard PCI card
• JTAG cable connector for Xilinx ChipScope

See http://www.digilentinc.com/Products/Detail.cfm?Prod=NETFPGA for more detailed technical information.

License

The NetFPGA-1G code is distributed using a BSD-style license.

NetFPGA-10G

Board Features^[8]

• Xilinx Virtex-5 TX240T FPGA
• 4 x 10 Gigabit Ethernet interfaces (SFP+ interfaces)
• 27 MBs QDRII SRAM
• 288 MBs RLDRAM-II
• Two high-speed QTH Samtec connectors
• Two Platform XL Flash (128 MB)
• Xilinx XC2C256 CPLD
• PCI Express x8 Gen2
• JTAG cable connector for Xilinx ChipScope

See http://www.hitechglobal.com/Boards/PCIExpress_SFP+.htm for more detailed technical information.

License

The NetFPGA-10G code base contains code covered under a variety of different licenses, though the default license is the GNU LGPL version 3.

Notes

1. ^ Sangjin Han, Keon Jang, KyoungSoo Park, and Sue Moon. 2010. PacketShader: a GPU-accelerated software router. In Proceedings of the ACM SIGCOMM 2010 conference on SIGCOMM (SIGCOMM '10). ACM, New York, NY, USA, 195-206.
2. ^ Mark Handley, Orion Hodson, and Eddie Kohler. 2003. XORP: an open platform for network research. SIGCOMM Comput. Commun. Rev. 33, 1 (January 2003), 53-57.
3. ^ Quagga, http://www.quagga.net/
4. ^ Eddie Kohler, Robert Morris, Benjie Chen, John Jannotti, and M. Frans Kaashoek. 2000. The click modular router. ACM Trans. Comput. Syst. 18, 3 (August 2000), 263-297.
5. ^ Michaela Blott, Jonathan Ellithorpe, Nick McKeown, Kees Vissers, Hongyi Zeng. 2010. FPGA Research Design Platform Fuels Network Advances. Xcell Journal. p24-29
6. ^ http://netfpga.org/
7. ^ http://netfpga.org/foswiki/bin/view/NetFPGA/OneGig/Publications
8. ^ http://www.hitechglobal.com/Boards/PCIExpress_SFP+.htm