Intel 80186

Infobox Computer Hardware Cpu
name = Intel 80186

---

caption = An Intel 80186 Microprocessor
produced-start = 1982
produced-end = present (the CMOS version)
slowest = 6| slow-unit = MHz
fastest = 12 | fast-unit = MHz
manuf1 = Intel
arch = x86-16
pack1 = 68-pin

The 80186 is a microprocessor that was developed by Intel circa 1982. The 80186 was an improvement on the Intel 8086 and Intel 8088. As with the 8086, it had a 16-bit external bus and was also available as the Intel 80188, with an 8-bit external data bus. The initial clock rate of the 80186 and 80188 was 6 MHz, but due to more hardware (in place of microcode) some of the individual instructions ran 10-20 times faster than on an 8086 at the same clock frequency. On the average, it ran at 1 million instructions per second. [http://www.geocities.com/SiliconValley/Pines/4011/misc-doc/Intel-Chips.htm]

They were generally used as embedded processors (roughly comparable to microcontrollers). They were not used in many personal computers, but there were some notable exceptions: the Wang Office Assistant, marketed as a pc-like stand-alone word processor which used a subset of their WP Plus word processing program; the Mindset; the Siemens PC-D [http://de.wikipedia.org/wiki/Siemens_PC-D] (Siemens' first DOS PC line, which ran MS-DOS v2.11 even though their hardware was not 100% IBM PC-compatible); the Compis (a Swedish school computer); the RM Nimbus (a British school computer); the Unisys ICON (a Canadian school computer); ORB Computer by ABS; the HP 200lx; the Tandy 2000 desktop (a somewhat PC-compatible workstation featuring particularly sharp graphics for its day); and the . Another British computer manufacturer, Acorn, created a plug-in second processor that contained the 80188 chip along with assorted support chips and 512 KB of RAM – hence the Master 512 system.

One major function of the 80186/80188 series was to reduce the number of chips required by including features such as a DMA controller, interrupt controller, timers, and chip select logic. New instructions were introduced as follows:

ENTER Make stack frame for procedure parameters LEAVE High-level procedure exit PUSHA Push all general registers POPA Pop all general registers BOUND Check array index against bounds UD2 Generate invalid opcode exception INS Input from port to string OUTS Output string to port

External links

* [http://www.intel.com/design/intarch/intel186/ Intel's Official Page for the 80186]
* [http://www.cpu-collection.de/?tn=1&l0=cl&l1=80186/188 Intel 80186/80188 images and descriptions at cpu-collection.de]
* [http://www.datasheetarchive.com/search.php?q=80186 Scan of the Intel 80186 data book at datasheetarchive.com]
* [http://www.intel.com/technology/computing/mi06031.htm Intel Microprocessor History]