Technical Floating Point

Technical Floating Point

The Technical Floating Point (TFP) model was a new set of computer processor instructions in microcode, designed by Advanced Micro Devices (AMD). It was used to replace the x87 floating point capabilities in the original Intel IA-32 architecture.

The x87 floating point model is the model Intel added into its x86 (IA-32) architecture, to perform floating point number mathematics. The implementation was based on a floating point stack, hence was very primitive and hard to optimize. Through the development of the computer software and hardware, the x87 instruction set becomes more and more the limited factor to accelerate the floating point processing power of the CPU(Central Processing Unit)s. Due to above reason, the TFP was designed to be a register-based floating point architecture, which was more advanced and flexible. The register-based floating point architecture is being widely used in RISC based machines, such as PowerPC, Alpha, SPARC, Intel IA-64, etc.

The TFP was intended to be implemented in the AMD64 instruction set. The AMD64 instruction set was designed by the Athlon 64 CPU team in AMD, Inc., implemented into its Athlon 64/FX series cpus. It is an extension to current x86 (IA-32) architecture, provides 64 bits width computation and memory addressing ability.

However, due to the lack of certainty of whether the TFP will be widely adopted by the software developers, along with the popularity of Intel SSE/SSE2 instruction sets, the TFP model was finally abandoned.


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