- 90 nanometer
The 90 nanometer (90 nm) process refers to the level of
CMOS process technology that was reached in the 2002-2003 timeframe, by most leading semiconductor companies, likeIntel ,AMD ,Infineon ,Texas Instruments ,IBM , andTSMC .The origin of the 90 nm value is historical, as it reflects a trend of 70% scaling every 2-3 years. The naming is formally determined by the
International Technology Roadmap for Semiconductors (ITRS ), hosted by Sematech.The 193 nm wavelength was introduced by many (but not all) companies for
lithography of critical layers mainly during the 90 nm node. Yield issues associated with this transition (due to the use of newphotoresist s) were reflected in the high costs associated with this transition.Even more significantly, the 300 mm wafer size became mainstream at the 90 nm node. The previous wafer size was 200 mm diameter.
As of 2008, 65 nm technology is largely replacing 90 nm technology in leading-edge chip products. However, some products, notably
chipset s, have moved from older 130 nm technology to the 90 nm process.Example: Elpida 90 nm DDR2 SDRAM process
* Use of 300 mm wafer size
* Use of KrF (248 nm) lithography withoptical proximity correction
* 512 Mb
* 1.8 V operation
* Derivative of earlier 110 nm and 100 nm processesSources: Elpida's presentation at Via Technology Forum 2005 and Elpida 2005 Annual Report
ee also
*
Photolithography References
External links
* [http://www.pcworld.com/reviews/article/0,aid,104975,src,ov,00.asp PC World Review]
* [http://www.itworld.com/Comp/1982/030924nano/ Review]ITworld
* [http://investor.com.com/AMD+enters+the+90-nanometer+zone/2100-1006_3-5313410.html AMD]
* [http://www.keepmedia.com/pubs/ECN/2002/08/01/239576?extID=10032&oliID=213 Fujitsu]
* [http://www.intel.com/technology/silicon/nanotechnology.htm Intel]
* [http://www.intel.com/pressroom/archive/releases/20020813tech.htm August, 2002 release by Intel]sequence
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