S1 Core

S1 Core (codename Sirocco) is an open source hardware microprocessor design developed by Simply RISC. Based on Sun Microsystems' UltraSPARC T1, the S1 Core is licensed under the GNU General Public License, which is the license Sun chose for the OpenSPARC project.

The main goal of the project is to keep the S1 Core as simple as possible to encourage developers. The major differences between T1 and S1 include:

* S1 Core only has one 64-bit SPARC Core (supporting 1 to 4 independent threads of execution) instead of 8 cores;
* S1 Core adds a Wishbone bridge, a reset controller and a basic interrupt controller;
* the S1 Core environment can be run using only free tools on a common x86 Linux machine.

ee also

*LEON
*OpenRISC

External links

* [http://www.srisc.com/?s1 Simply RISC - S1 Core]
* [http://www.opencores.org/projects.cgi/web/s1_core/overview S1 Core page on OpenCores]
* [http://s1.sunsource.net S1 Core page on SunSource]
* [http://dmoz.org/Computers/Hardware/Components/Processors/SPARC/Open_Source/ Open Directory: Computers: Hardware: Components: Processors: SPARC: Open Source]