IBPI

IBPI is an acronym for International Blinking Pattern Interpretation (IBPI), and defines these two items:
1) How SGPIO is interpreted into states for drives or slots on a backplane.
2) How LEDs on a Backplane should represent these states.

IBPI is a rapidly emerging industry standard and defined by SFF-8489. SGPIO has been adopted across the storage industry, and has in large replaced proprietary protocols, SCSI Enclosure Service (SES) and SAF-TE over I2C. SGPIO is defined by the SFF-8485 specification.

States for drives or slots can be i.e. empty, failed, rebuilding, etc.The state of a drive or slot is determined by the Host Bus Adapter, and is typically transmitted to the backplane through SGPIO-signals on a cable.

Typical System Storage Architecture

This illustrations show a typical case where SGPIO is found. The Host Bus Adapter (HBA) connects to a backplane through a 4x iPass cable. The SGPIO-signals run inside this cable. The Backplane may then optionally connect to the Baseboard_management_controller of a Motherboard through an I2c or SMBus.

HW Layer: The physical SGPIO bus and signal definitions

The SGPIO signal consists of 4 electrical signals. It originates (or is driven by) an "initiator" (typically a Host Bus Adapter (HBA) or SAS Expander) and arrives at a "target" (typically a backplane).

The SGPIO is typically used in conjunction with SAS or SATA cables, where each physical port is attached to a single disk drive.

GPIO Protocol Layer: The SGPIO Bit Definitions

The figure below shows the relationship between SClock, SLoad and the two data bits; SDataOut and SDataIn. An SGPIO frame is started after SLoad has been low for at least 5 SClock cycles.

Following the start of a new SGPIO frame, 3 bits per drive are driven from the initiator on to the SDataOut line. Simultaneously, the target drives 3 bits on the SDataIn line.The initiator and target both use the rising edge clock to transmit changes in the SLoad, SDataOut, and SDataIn.

The figure shows SGPIO for 4 drive slots (12 clocks), which is the minimum allowed. The SGPIO stream can be larger and it is not uncommon for the stream to consist of slot data for 12, 24 or 36 drives/slots in the case of an expander.

GPIO Protocol Layer: Definition of the 3 bits

The 3 bits per drive is illustrated and interpreted as follows:

The first bit (ODn.0) is exclusively used to represent Activity.The second and third bits; Locate (ODn.1) and Fail (ODn.2) are directly used to represent a locate and fail state of the drive.

hortcomings in SGPIO and the IBPI Specification Advantages

The original SGPIO stream was intended for a low-cost implementation in lower end systems,and is limited to the capability of representing Activity, Locate and Fail LEDs. SGPIO became popular and adopted by HBA backplane and backplane vendors in 2004, and increasingly popular after the launch of backplane controller chips that support the SGPIO standard, such as MG9077 and MG9082 from American Megatrends. The MG9082 is the first chip available on the market that fully support IBPI.

With the advent of SAS/SATA hard drives, backplanes typically do not vary much from low to high end systems, except the addition of an extra physical port in the case of SAS. Since it is not economical for systems vendors to design separate backplanes for high and low end systems, the SGPIO standard became popular also in mid-range and higher end systems.

In higher end feature-rich systems the Initiators are capable of providing additional useful status information, such as rebuilding drives and predicted failures of drives. There was no standard for representing these conditions in the original SGPIO specification, at the same time as efforts were being made to elaborate a variety of additions to the standard by component vendors. This resulted in the IBPI specification, which uses blinking frequencies of bits in the SGPIO stream to represent additional states of drives.

IBPI Spec: SGPIO Interpretation

There are 3 bits per slot (or hard drive) in the SGPIO specification. This section describes how each of these bits are interpreted according to the IBPI specification.

Only the "Activity Bit" is interpreted independently of the two other bits. The two other bits (Locate and Fail) may be interpreted in combination with each other in the special case when both bits are driven "solid on".In any other case, the Locate and Fail bits are interpreted independently.

Note that the interpreted conditions described in this section is only used to determine the condition of bits, and does not describe how LEDs are driven based on these conditions. This is described in the section .

Hard Drive Presence (Slot Mated Status) and Valid States
When the hard drive for a particular slot is not present or has been removed, activity for that slot has no meaning, and should not be interpreted. Since it could still be desirable to locate the slot or indicate a failure, the Locate and Fail bits may have meaning for a particular slot, even if the physical drive is not present.

Activity Bit (ODn.0) Interpretation
The following section describes how the Activity Bit should be interpreted according to the IBPI specification.

Condition	SDataOut	SGPIO Interpretation
Drive Present	ODn.0 (Activity Bit)	State:	Description:
YES	0	No activity
	1	activity
NO	X	N/A	The Activity Bit is masked and not used in interpretation. Only the Locate and Fail bits remain valid for a slot with a drive that is not present
0-Logical Low Signal (remaining low for 2 or more seconds) 1-Logical High Signal (remaining high for 2 or more seconds) n Hz – Signal toggles between 0 and 1 at the frequency of n Hz at a duty cycle of 50 % +/- 5 %. X-Don’t Care

Locate Bit (ODn.1) and Fail Bit (ODn.2) Interpretation
The following section shows how the Locate and Fail bits should be interpreted according to the IBPI specification.

SGPIO-SDATAOUT bits:		SGPIO Interpretation
ODn.1 (Locate)	ODn.2 (Fail)	State:	Description:
1	0	Locate (identify)	This state is used to identify a slot or drive
0	1	Fail	This state indicates a slot with a failed drive
1	1	Rebuild (preferred)	Because of legacy and cross-compatibility with SGPIO initiators, both interpretations of Rebuild should be supported
X	1 Hz	Rebuild (supported)
X	2 Hz	PFA	Predicted Failure Analysis. The drive in this slot is still working but predicted to fail soon
X	4 Hz	Hotspare	This slot has a drive that is marked to be automatically rebuilt and used as a replacement for a failed drive
1 Hz	X	In A Critical Array	The array in which this slot is part of is degraded
2 Hz	X	In A Failed Array	The array in which this slot is part of is failed
4 Hz	X	(reserved)	(This case is not yet determined by the spec and remains available for future use)
0-Logical Low Signal (remaining low for 2 or more seconds) 1-Logical High Signal (remaining high for 2 or more seconds) n Hz – Signal toggles between 0 and 1 at the frequency of n Hz at a duty cycle of 50 % +/- 5 % X-Don’t Care

IBPI Spec: LED Blinking Pattern Interpretation

The IBPI standard defines interpretations for both 2 and 3 LED implementations as shown in Figure 3.

SGPIO-SDATAOUT bit:	2 LEDS/SLOT		3 LEDS/SLOT
	Activity LED	Status LED	Activity LED	Locate LED	Fail LED
Description:
Drive Not Present	OFF	X	OFF	X	X
Drive Present, No Activity	ON	X	ON	X	X
Drive Present, Activity	4Hz	X	4Hz	X	X
Locate (Identify)	4Hz	4Hz	X	4Hz	OFF
Fail	X	ON	X	OFF	ON
Rebuild	X	1Hz	X	OFF	1Hz
Rebuild	X	1Hz	X	OFF	1Hz
PFA	X	2 Fast Blinks at 4Hz & Pause for 0.5 sec	X	X	2 Fast Blinks at 4Hz & Pause for 0.5 sec
Hotspare	X	2 Fast Blinks at 4Hz & Pause for 3.5 sec	X	X	2 Fast Blinks at 4Hz & Pause for 3.5 sec
In A Critical Array	X	X	X	X	X
In A Failed Array	X	X	X	X	X
(undefined)	X	X	X	X	X

ummary: Combined IBPI Interpretation Table

This table summarizes the individual tables defined earlier into one global table for clarity.

SGPIO-SDATAOUT bit:	ODn.0 (Activity)	ODn.1 (Locate)	ODn.2 (Fail)	2 LEDS/SLOT		3 LEDS/SLOT
				Activity LED	Status LED	Activity LED	Locate LED	Fail LED
Description:
Drive Not Present	X	X	X	OFF	X	OFF	X	X
Drive Present, No Activity	0	X	X	ON	X	ON	X	X
Drive Present, Activity	1	X	X	4Hz	X	4Hz	X	X
Locate (Identify)	X	1	0	4Hz	4Hz	X	4Hz	OFF
Fail	X	0	1	X	ON	X	OFF	ON
Rebuild	X	1	1	X	1Hz	X	OFF	1Hz
Rebuild	X	X	1Hz	X	1Hz	X	OFF	1Hz
PFA	X	X	2Hz	X	2 Fast Blink at 4Hz & Pause for 0.5 sec	X	X	2 Fast Blink at 4Hz & Pause for 0.5 sec
Hotspare	X	X	4Hz	X	2 Fast Blink at 4Hz & Pause for 3.5 sec	X	X	2 Fast Blink at 4Hz & Pause for 3.5 sec
In A Critical Array	X	1Hz	X	X	X	X	X	X
In A Failed Array	X	2Hz	X	X	X	X	X	X
(undefined)	X	4Hz	X	X	X	X	X	X

External links

* [ftp://ftp.seagate.com/sff/ SFF Documents] (Documents & Specifications)
* [ftp://ftp.seagate.com/sff/SFF-8485.PDF SFF-8485] SGPIO specification
* [ftp://ftp.seagate.com/sff/SFF-8489.PDF SFF-8489] IBPI specification
* [http://www.ami.com/products/catpage.cfm?CatID=14 Backplane Controllers from AMI]

*MG9077 Backplane Management Controller With Dual SGPIO
*MG9082 Backplane Management Controller With Dual SGPIO and IBPI support