- Breker Verification Systems
Articleissues
advert = September 2008
notable = September 2008
orphan = April 2008
refimprove = September 2008Overview
Breker Verification Systems is a venture-backed, privately-held EDA company supplying graph-based functional test synthesis tools that solve functional verification challenges in today’s complex designs.
Breker was founded in 2003, and is headquartered in Austin, Texas.
Products
Trek™ is a functional test synthesis tool that develops functional verification tests for complex digital designs. Using a visual graph-based verification plan and generating test directly from the plan, Trek makes the entire process easy and systematic:
Using patented technology that combines graphs with dependency resolution, Breker’s software reduced the verification effort by over a factor of 10, resulting in first-silicon success for numerous customers.
References
* [http://www.edadesignline.com/showArticle.jhtml;jsessionid=J4JSBZ4FYIGD2QSNDLPSKH0CJUNN2JVN?articleID=207501891&queryText=breker+verification+systems "Host Bus Adapter(HBA)Verification with Trek"] , EDA Designline, May 6, 2008.
* [http://www.cimdata.com/newsletter/2008/12/04/12.04.04.htm "IEC Announces 2008 DesignCon Paper Award Winners"] , CIMData, March 19, 2008.
* [http://www.scdsource.com/article.php?id=115 "Mentor offers 'intelligent' testbench generation tool"] , SCD Source, February 18, 2008.
* [http://www.chipdesignmag.com/display.php?articleId=1976 "Nightmares in Functional Verification"] , Chip Design, February 8, 2008.
* [http://www.scdsource.com/article.php?id=107 "Coverage metrics not enough, verification experts say"] , SCD Source, February 7, 2008.
* [http://www.reuters.com/article/pressRelease/idUS107864+04-Feb-2008+BW20080204 "Breker Verification Systems to Speak Out on Coverage-Driven Verification at DesignCon"] , Reuters, February 4, 2008.
* [http://www.edn.com/index.asp?layout=article&articleid=CA6512871 "EDN Hot 100 Products of 2007: EDA"] , EDN December 14, 2007.
* [http://www.chipdesignmag.com/display.php?articleId=1924 "Three Views on Verification Challenges"] , Chip Design, October/November, 2007.
* [http://eetimes.com/news/design/showArticle.jhtml;jsessionid=0GUXC5E5TLKBYQSNDLOSKHSCJUNN2JVN?articleID=199702008 "Tool makers look to fix bottlenecks, fill gaps"] , EETimes, May 28, 2007.External links
* http://www.brekersystems.com
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