JEDEC memory standards

JEDEC memory standards

The JEDEC Solid State Technology Association is the semiconductor engineering standardization body of the Electronic Industries Alliance (EIA). Semiconductor memory is a very active area of standardization today. JEDEC Standard 21 specifies semiconductor memories from the 256 bit static RAM (".25Kb") [http://www.jedec.org/download/search/3_07_01R5.pdf] to the latest DDR3 SDRAM modules

This standard, JESD21-C "Configurations for Solid State Memories", is maintained by JEDEC committee JC41. The members are from companies that make microprocessors, memory ICs, memory modules, and other components. The members also come from companies that design these components into systems such as video cards and personal computers. There are additional committees for other aspects of memory standards.

Most JEDEC standards are published as a complete document. When a revision is required the document is republished. Additions to Standard 21 are so frequent that it is published in loose-leaf format and comes in a three-ring binder.

In the 1980s the configuration of a family of memories could be specified on a single page. Modern memory modules require over 100 pages; standards for the memory IC [http://www.jedec.org/download/search/JESD79E.pdf] and a reference design of the module. [http://www.jedec.org/download/search/4_20_16R16.pdf] The standards specify the physical dimensions for the module, the electrical characteristics for the module and even the data for doing computer simulations of the memory module operating in a system.

A memory module like the DDR2-SDRAM is available for laptop, desktop, and server computers. There is also a wide selection of memory capacities and speeds. The standards specify memory module label formats for "End User Markets". [http://www.jedec.org/download/search/N06-NM5.pdf] For example:

1GB 2Rx4 PC2-3200P-333-11-D2 is a 1GB DDR2 Registered DIMM, with address/command parity function, using 2 ranks of x4 SDRAMs operational to PC2-3200 performance with CAS Latency = 3, tRCD = 3, tRP = 3, using JEDEC SPD revision 1.1, raw card reference design file D revision 2 used for the assembly.

JEDEC Standard 100B.01 [Citation
last = JEDEC Solid State Technology Association
title = Terms, Definitions, and Letter Symbols for Microcomputers, Microprocessors, and Memory Integrated Circuits
journal = JESD 100B.01
date = December 2002
url = http://www.jedec.org/download/search/JESD100B01.pdf
] defines the "prefix to units of semiconductor storage capacity" as follows:
* kilo (K): A multiplier equal to 1024 (210).
* mega (M): A multiplier equal to 1 048 576 (220 or K2, where K = 1024).
* giga (G): A multiplier equal to 1 073 741 824 (230 or K3, where K = 1024).

It notes that these prefixes are used in their decimal sense for serial communication data rates measured in bits:

It also defines:
* bit (b): In the binary numeration system, either of the digits 0 or 1. (Ref. ANSI X3.172.)
* byte (B): A binary character string operated upon as a unit and usually shorter than a computer word. (Ref. ANSI X3.172.) NOTE A byte is usually eight bits.

The rationale for including these definitions is explained and contrasted to the IEC standard prefixes by this footnote in the standard:

All JEDEC standards avoid the use of the terms megabit, megabyte, gigabyte, etc, and refer to memory capacity as a number followed by the units. (64Mb, 256MB or 1GB.)

The IEC uses the prefix "kibi-" to mean 1024, similarly "mebi-", "gibi-" and "tebi-" for its powers, noting further: "IEC suggests that, in English, the first syllable of the name of the binary-multiplier prefix should be pronounced in the same way as the first syllable of the name of the corresponding SI prefix and that the second syllable should be pronounced as 'bee'."

References

External links

* [http://www.jedec.org/Catalog/display.cfm Online JEDEC Documents]


Wikimedia Foundation. 2010.

Игры ⚽ Поможем написать реферат

Look at other dictionaries:

  • JEDEC — Solid State Technology Association, formerly known as Joint Electron Device Engineering Council (JEDEC) or Joint Electron Device Engineering Councils , is the semiconductor engineering standardization body of the Electronic Industries Alliance… …   Wikipedia

  • Memory controller — The memory controller is a digital circuit which manages the flow of data going to and from the main memory. It can be a separate chip or integrated into another chip, such as on the die of a microprocessor. This is also called a Memory Chip… …   Wikipedia

  • Memory rank — A memory rank is a set of DRAMs connected to the same chip select, and which are therefore accessed simultaneously. In practice they also share all of the other command and control signals, and only the data pins for each DRAM are separate (but… …   Wikipedia

  • Memory bus — The memory bus is the computer bus which connects the main memory to the memory controller in computer systems. Originally, general purpose buses like VMEbus and the S 100 bus were used, but to reduce latency, modern memory buses are designed to… …   Wikipedia

  • Small Outline Dual Inline Memory Module — SO DIMM bestückt mit 128 MByte SDRAM in „Chip On Board Technologie“ (COB) …   Deutsch Wikipedia

  • Double Data Random Access Memory — 2 DDR SDRAM Module – oben 512 MB mit sogenanntem „Heatspreader“ und beidseitig bestückt, unten 256 MB einseitig bestückt DDR SDRAM („Double Data Rate Synchronous Dynamic Random Access Memory“) ist ein Typ von Random Access Memory (RAM). Verwendet …   Deutsch Wikipedia

  • Double Data Rate Synchronous Dynamic Random Access Memory — 2 DDR SDRAM Module – oben 512 MB mit sogenanntem „Heatspreader“ und beidseitig bestückt, unten 256 MB einseitig bestückt DDR SDRAM („Double Data Rate Synchronous Dynamic Random Access Memory“) ist ein Typ von Random Access Memory (RAM). Verwendet …   Deutsch Wikipedia

  • Dynamic random access memory — (DRAM) is a type of random access memory that stores each bit of data in a separate capacitor within an integrated circuit. Since real capacitors leak charge, the information eventually fades unless the capacitor charge is refreshed periodically …   Wikipedia

  • Dynamic random-access memory — DRAM redirects here. For other uses, see Dram (disambiguation). Computer memory types Volatile RAM DRAM (e.g., DDR SDRAM) SRAM In development T RAM Z RAM TTRAM Historical Delay line memory Selectron tube Williams tube …   Wikipedia

  • Synchronous Dynamic Random Access Memory — SDRAM Modul SDRAM Speichermodule auf einer …   Deutsch Wikipedia

Share the article and excerpts

Direct link
Do a right-click on the link above
and select “Copy Link”