SWAR

Overview

SWAR is an acronym for SIMD Within A Register.
SIMD, in turn, stands for Single Instruction, Multiple Data.

Many modern general-purpose computer processors have some provisions for SIMD, in the form of a group of registers and instructions to make use of them. SWAR refers to the use of those registers and instructions, as opposed to using specialized processing engines designed to be better at SIMD operations. It also refers to the use of SIMD with general-purpose registers and instructions that are not designed for it, by way of various software tricks.

ee also

* [http://www.aggregate.org/SWAR/ The Aggregate] (or http://dynamo.ecn.purdue.edu/~hankd/SWAR/)
*SIMD engines: vector processor, array processor, digital signal processor, stream processor.
*SWAR on x86 processors: MMX, 3DNow!, SSE, SSE2, SSE3