Advanced Programmable Interrupt Controller

In computing, an Advanced Programmable Interrupt Controller (APIC) is a more complex Programmable Interrupt Controller (PIC) than Intel's original types such as the 8259A. APIC devices permit more complex priority models, and Advanced IRQ (Interrupt Request) management.

One of the best known APIC architectures, the Intel APIC Architecture, has largely replaced the original 8259A PIC in newer x86 computers, starting with SMP systems when it replaced proprietary SMP solutions and on pretty much all PC compatibles since around late 2000 when Microsoft began encouraging PC vendors to enable it on uniprocessor systems and even made it a requirement of PC 2001 to enable it on desktop systems.^[1] AMD and Cyrix once used the similar OpenPIC architecture; this can support up to 32 processors.^[2] After its failure however, AMD decided to license the Intel APIC Architecture for its AMD Athlon and later processors.

Controlling Device Requests

We know that I/O device interface generates an interrupt request when SIN or SOUT bit in its status register is =1.Interrupt requests are generated only by the I/O devices that some program is using. Idle devices must not generate interrupt requests even if they are participating in I/O transfer operations. We need a way to enable or disable interrupts in order to control whether the device is generating an interrupt request.For this control we use Interrupt Enable bit in device's interface circuit.

Interrupt Enable (IE)

IE bit can be set or reset by processor.It can be a part of control or status register in which processor can write.Case1:When IE=1,interface circuit generates an interrupt request and sets its IRQ bit whenever its SIN or SOUT bit is set.Case2:When IE=0,interface circuit does not generate an interrupt request,regardless of the state of SIN or SOUT. Interrupt enable bits IE(SIN) and IE(SOUT) are often used.IE(SIN) enables interrupts when SIN=1.IE(SOUT) enables interrupts when SOUT=1.

Summary

Interrupt requests can be controlled using two ways.I.At device end-An Interrupt Enable bit in a control register determines whether device is allowed to generate an interrupt request.II.At processor end-A priority structure and an interrupt mask in the PS determine whether a given interrupt request is accepted.

References

1. ^ "The Importance of Implementing APIC-Based Interrupt Subsystems on Uniprocessor PCs". Microsoft. 7 January 2010. http://www.microsoft.com/whdc/archive/apic.mspx. 
2. ^ "OpenPIC Definition from PC Magazine Encyclopedia". Pcmag.com. 1994-12-01. http://www.pcmag.com/encyclopedia_term/0,2542,t=OpenPIC&i=48497,00.asp. Retrieved 2011-11-03. 

• IA-32 Intel Architecture Software Developer’s Manual, Volume 3A: System Programming Guide, Part 1, chapter 10

Computer Organisation by Carl Hamacher,Zvonko Vranesic & Safwat Zaky Fifth Edition

See also

• Intel 8259
• Programmable Interrupt Controller (PIC)
• Intel APIC Architecture
• Inter-processor interrupt (IPI)
• Interrupt
• Interrupt handler
• Interrupt latency
• LAPIC
• Non-maskable interrupt (NMI)

This computer hardware article is a stub. You can help Wikipedia by expanding it.v · Categories: Motherboard Interrupts Computer hardware stubs Wikimedia Foundation. 2010. Игры ⚽ Поможем сделать НИР Marceli Nencki Marcus Drum Look at other dictionaries: Advanced Programmable Interrupt Controller — o APIC es un controlador de interrupciones, incorporado en la unidad central de procesamiento y diseñado por y para el multiproceso, concretamente para poder incorporar múltiples microprocesadores a la placa madre. No confundir con el I/O APIC de …   Wikipedia Español Advanced Programmable Interrupt Controller — Der Advanced Programmable Interrupt Controller (APIC, nicht zu verwechseln mit ACPI) sorgt für die Verteilung von Interrupts in x86 und Itanium basierenden Computersystemen. Der APIC besteht im Gegensatz zum PIC aus zwei Komponenten, dem Local… …   Deutsch Wikipedia Programmable Interrupt Controller — A Programmable Interrupt Controller (PIC) is a device which allows priority levels to be assigned to its interrupt outputs. When the device has multiple interrupt outputs to assert, it will assert them in the order of their relative priority.… …   Wikipedia Programmable Interrupt Controller — Ein Programmable Interrupt Controller (PIC) ist ein integrierter Schaltkreis zur Verwaltung mehrerer Hardware Interrupts und zu deren geordneter Weiterleitung an eine CPU. Denn Prozessoren (z. B. Intel und AMD Prozessoren) weisen oft nur… …   Deutsch Wikipedia Interrupt-Controller — Als Interrupt Controller bezeichnet man die Funktionseinheit im Computer, die für die Entgegennahme und Verteilung der Interrupts zuständig ist. Dieser befindet sich in der Regel in der Southbridge des Hauptplatinen­chipsatzes und leitet die… …   Deutsch Wikipedia Interrupt Controller — Als Interrupt Controller bezeichnet man die Funktionseinheit im Computer, die für die Entgegennahme und Verteilung der Interrupts zuständig ist. Dieser befindet sich in der Regel in der Southbridge des Hauptplatinen­chipsatzes und leitet die… …   Deutsch Wikipedia Interrupt request — IRQ redirects here. For the country with the ISO 3166 1 country code, see Iraq. The computing phrase interrupt request (or IRQ) is used to refer to either the act of interrupting the bus lines used to signal an interrupt, or the interrupt input… …   Wikipedia Interrupt — This article is about computer interrupts. For the study of the effect of disruptions on job performance, see Interruption science. In computing, an interrupt is an asynchronous signal indicating the need for attention or a synchronous event in… …   Wikipedia Interrupt storm — In operating systems, an interrupt storm is an event during which a processor receives an inordinate number of interrupts that consume the majority of the processor s time. Interrupt storms are typically caused by hardware devices that do not… …   Wikipedia Interrupt latency — In Realtime Operating Systems, Interrupt latency is the time between the generation of an interrupt by a device and the servicing of the device which generated the interrupt. For many operating systems, devices are serviced as soon as the device… …   Wikipedia 18+ © Academic, 2000-2024 Contact us: Technical Support, Advertising Dictionaries export, created on PHP, Joomla, Drupal, WordPress, MODx. Mark and share Search through all dictionaries Translate… Search Internet Share the article and excerpts Direct link … Do a right-click on the link above and select “Copy Link”