Intel Xeon chipsets

Around the time that the Pentium 3 processor was introduced, Intel's Xeon line diverged from its line of desktop processors, which at the time was using the Pentium branding.

The divergence was implemented by using different sockets; since then, the sockets for Xeon chips have tended to remain constant across several generations of implementation.

The chipsets contain a 'memory controller hub' and an 'I/O controller hub', which tend to be called 'north bridge' and 'south bridge'. The memory controller hub connects to the processors, to memory, to high-speed I/O such as PCI Express, and to the I/O controller hub by a proprietary link; the I/O controller hub then connects to lower-speed I/O, such as hard discs, PCI slots, USB and Ethernet.

Two-socket chipsets for Core 2-based Xeons (Socket 771)

These chipsets use a 'dual independent bus' design, in which each socket has its own connection to the chipset.

Four-socket chipsets for Core 2-based Xeons

This chipset uses four independent buses, and is used by the Tigerton and Dunnington processors.

References

* http://www.intel.com/Assets/PDF/datasheet/313070.pdf is the datasheet for the 5000X MCH
* http://www.intel.com/Assets/PDF/datasheet/313071.pdf is the datasheet for the 5000P, 5000V and 5000Z MCH
* http://www.intel.com/Assets/PDF/datasheet/318610.pdf is the datasheet for the 5400 MCH
* http://www.intel.com/Assets/PDF/datasheet/318082.pdf is the datasheet for the 7300 MCH