Architecture Design and Assessment System

Architecture Design and Assessment System

The Architecture Design and Assessment System (ADAS) was a set of software programs offered by the Research Triangle Institute from the mid 1980s untilthe early 1990s. [G.A. Frank, D.L. Franke, and W.F. Ingogly, "An Architecture Design and Assessment System,"VLSI Design, Vol. 6, No. 8, Aug. 1985, pp. 30-50]

A petri net-like graph model of a system was graphically created.The hierarchical graphs were simulated to determine resource utilization and throughput. Functional simulation of the model could be realized by attaching C (programming language) or Ada (programming language) code to the nodes. This enabled dynamic resource assignment, timing, and priority.

Simulation Model

An ADAS model consisted of nodes connected by directed arcs.

For abstract simulation a node represents a process (systems engineering) in the system that you are modeling. The readiness for execution or firing of this process requires that: its inputs are satisfied, space is available for its outputs, and its shared resource/hardware is available. During execution the node consumes its inputs, uses the resource for the prescribed duration, then produces its outputs.

The inputs and outputs of a process are represented by discrete tokens. These tokens flow along the arcs in the graph. If the maximum arc size is greater that one, then an arc would represent a buffer between system processes.

To refine the model of the system, a subgraph could be placed below the node to refine the behavior of that process.

Physical and behavioral properties were attached to nodes and arcs in the form of attributes. The attribute definition language allowed the computation of attributes from ancestor attributes and global values.


Further Reading

* [ An Architecture Design and Assessment System for Software/Hardware Codesign, Proceedings of the 22nd ACM/IEEE conference on Design automation, 1985]

* [ The Modified Computational Graph and its Usage in Concurrent System Design and Analysis, Proc. of the Fifth Int. Conf. on Systems Engineering, pages 385-388. New York: IEEE, 1987]

* [ The Modelling of a Spaceflight Optical Disk Recorder Controller Using the Architecture Design and Assessment System, IEEE Southeast Con, Apr 1990]

* [ Application of Structured Analysis to a Telerobotic System, IEEE Internation Conference on System Engineering, Aug 1990]

* [ Multiprocessor Performance Modeling with ADAS, AIAA Computers in Aerospace Conference, 7th, Monterey, CA, Oct 3-5, 1989]

* [ Modeling and Analysis of Multiprocessor Architectures, AIAA-1989-3014]

* [ The Test Engineer's Assistant: A Support Environment for Hardware Design for Testability, IEEE Computer Apr. 1989]
* Integration of Tools for the Design and Assessment of High-Performance, Highly Reliable Computing System (DAHPHRS) Phase 1, NASA Contract NAS1-17964, May 1992, page 141

* [ CSP-based object-oriented description and simulation of a reconfigurable adaptive beamforming architecture using the OODRA workbench, The Journal of VLSI Signal Processing, Nov 1990]

* [ Aircraft design for mission performance using nonlinear multiobjective optimization methods, Journal of Aircraft (ISSN 0021-8669), vol. 27, Dec. 1990]

* [ Parallelism in Sequential Multiprocessor Simulation Models: a Case Study, ACM Transactions on Modeling and Computer Simulation, Apr. 1995]

* The Practice of Prolog: a Prolog-based VLSI editor, Leon Sterling, 1990, ISBN 0262193019

* [ Design Automation Technology for Codesign: Status and Directions,1992 IEEE International Symposium on Circuits and Systems]

* [ Aladdin Software Support, Proceedings of the IEEE 1991 National Aerospace and Electronics Conference]

* Performance Analysis of a Large-Grain Dataflow Scheduling Paradigm, NASA Langley, June 1993, page 8

* [ Automated Fault Tolerance Evaluator for System Design, Simulation, and Analysis, Proceedings., IEEE/AIAA/NASA 9th Digital Avionics Systems Conference, 1990]

* Virtual Prototyping, Digital Signal Processing Systems, 1998 Lockheed Martin Technology Symposium, slide 7

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