Lookahead Carry Unit

A Lookahead Carry Unit (LCU) is a logical unit in digital circuit design used to decrease calculation time in adder units and used in conjunction with carry look-ahead adders (CLAs).

16-bit adder

By combining four 4-bit CLAs, a 16-bit adder can be created but additional logic is needed in the form of an LCU.A single 4-bit CLA is shown below:

The LCU accepts the group propagate ($PG$) and group generate ($GG$) from each of the four CLAs.The LCU then generates the carry input for each CLA.

Assume that $P\_i$ is $PG$ and $G\_i$ is $GG$ from the i^th CLA then the output carry bits are

:$C\_\{4\}\; =\; G\_0\; +\; P\_0\; cdot\; C\_0$:$C\_\{8\}\; =\; G\_\{4\}\; +\; P\_\{4\}\; cdot\; C\_\{4\}$:$C\_\{12\}\; =\; G\_\{8\}\; +\; P\_\{8\}\; cdot\; C\_\{8\}$:$C\_\{16\}\; =\; G\_\{12\}\; +\; P\_\{12\}\; cdot\; C\_\{12\}$

Substituting $C\_\{4\}$ into $C\_\{8\}$, then $C\_\{8\}$ into $C\_\{12\}$, then $C\_\{12\}$ into $C\_\{16\}$ yields the expanded equations:

:$C\_\{4\}\; =\; G\_0\; +\; P\_0\; cdot\; C\_0$:$C\_\{8\}\; =\; G\_4\; +\; G\_0\; cdot\; P\_4\; +\; C\_0\; cdot\; P\_0\; cdot\; P\_4$:$C\_\{12\}\; =\; G\_8\; +\; G\_4\; cdot\; P\_8\; +\; G\_0\; cdot\; P\_4\; cdot\; P\_8\; +\; C\_0\; cdot\; P\_0\; cdot\; P\_4\; cdot\; P\_8$:$C\_\{16\}\; =\; G\_\{12\}\; +\; G\_8\; cdot\; P\_\{12\}\; +\; G\_4\; cdot\; P\_8\; cdot\; P\_\{12\}\; +\; G\_0\; cdot\; P\_4\; cdot\; P\_8\; cdot\; P\_\{12\}\; +\; C\_0\; cdot\; P\_0\; cdot\; P\_4\; cdot\; P\_8\; cdot\; P\_\{12\}$

$C\_\{4\}$ corresponds to the carry input into the second CLA; $C\_\{8\}$ to the third CLA; $C\{12\}$ to the fourth CLA; and $C\_\{16\}$ to overflow carry bit.

In addition, the LCU can calculate its own propagate and generate::$P\_\{LCU\}\; =\; P\_0\; cdot\; P\_4\; cdot\; P\_8\; cdot\; P\_\{12\}$:$G\_\{LCU\}\; =\; G\_\{12\}\; +\; G\_8\; cdot\; P\_\{12\}\; +\; G\_4\; cdot\; P\_\{12\}\; cdot\; P\_8\; +\; G\_0\; cdot\; P\_\{12\}\; cdot\; P\_8\; cdot\; P\_4$

64-bit adder

By combining 4 CLAs and an LCU together creates a 16-bit adder.Four of these units can be combined to form a 64-bit adder.An additional (second-level) LCU is needed that accepts the propagate ($P\_\{LCU\}$) and generate ($G\_\{LCU\}$) from each LCU and the four carry outputs generated by the second-level LCU are fed into the first-level LCUs.

References

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