WDC 65C51

The CMOS W65C51S Asynchronous Communications Interface Adapter (ACIA) provides an easily implemented, program controlled interface between microprocessor based systems and serial communication data sets and modems. It is produced by Western Design Center (WDC).

The ACIA has an internal baud rate generator. This feature eliminates the need for multiple component support circuits. The Transmitter baud rate can be selected under program control to be 1 of 15 different rates from 50 to 19,200 baud, or at 1/16 times an external clock rate. The Receiver baud rate may be selected under program control to be either the Transmitter rate or at 1/16 times the external clock rate. The ACIA has programmable word lengths of 5, 6, 7 or 8 bits; even, odd or no parity 1, 1½ or 2 stop bits.

The ACIA is designed for maximum programmed control from the microprocessor (MPU) to simplify hardware implementation. Three separate registers permit an MPU to easily select the W65C51S operating modes, data checking parameters and determine operational status.

Command Register controls parity, receiver echo mode, transmitter interrupt control, the state of the RTS line, receiver interrupt control and the state of the DTR line.

Control Register controls the number of stop bits, word length, receiver clock source and baud rate.

Status Register indicates the stats of the IRQ, DSR, and DCD lines, Transmitter and Receiver Data Registers and Overrun, Framing and Parity Error conditions.

Transmitter and Receiver Data Registers are used for temporary data storage by the ACIA Transmit and Receiver circuits.

The WDC 65c51 is currently available from WDC only as a sample, they do not offer a purchase option on their website.

External links

* [http://www.65xx.com/wdc/documentation/w65c51s.pdf W65C51S Datasheet]