Numeric std

numeric_std

numeric_std is a library package defined for VHDL

This package provides arithmetic functions for vectors. Overrides of std_logic_vector are defined for signed and unsigned arithmetic.

It is typically included at the top of a design unit:

    library ieee;
    use ieee.std_logic_1164.all;        -- standard unresolved logic UX01ZWLH-
    use ieee.numeric_std.all;       -- for the signed, unsigned types and arithmetic ops

The alternative numeric package ieee.std_logic_arith should not be used for new designs ^{[1] [2]}
This package does not provide overrides for mixing signed and unsigned functions.

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This package includes definitions for the following (not all of which are synthesizable): ^[3]
sign changing operators

• abs
• -

arithmetic operators

• +
• -
• *
• /
• rem
• mod

Note: the second argument of /, rem, or mod must be nonzero.
comparison operators

• >
• <
• <=
• >=
• =
• /=

shift and rotate functions

• SHIFT_LEFT
• SHIFT_RIGHT
• ROTATE_LEFT
• ROTATE_RIGHT
• sll
• srl
• rol
• ror

resize function

• RESIZE(v,n)

Note: when increasing the size of a signed vector the leftmost bits are filled with the sign bit, while truncation retains the sign bit along with the (n-1) rightmost bits. For an unsigned vector, a size increase fills the leftmost bits with zero, while truncation retains n rightmost bits.
conversion functions

• TO_INTEGER
• TO_UNSIGNED
• TO_SIGNED

Note: The latter two functions each require a second argument specifying the length of the resulting vector.
logical operators

• not
• and
• or
• nand
• nor
• xor
• xnor

match function

• STD_MATCH

Note: compares argument vectors element by element, but treats any bit with the value '-' as matching any other STD_ULOGIC value. Returns false if any argument bit is 'U', 'X', 'W', or 'Z'.
special translation function

• TO_01

Note: 'H' is translated to '1' and 'L' is translated to '0'; this function takes an optional second argument XMAP, which can be any of the std_logic values, but defaults to '0'. Any value besides 01LH in the input argument results in all bits being set to XMAP, with a warning issued.

References

1. ^ [1]
2. ^ also search on the string "std_logic_arith deprecated"
3. ^ 1076.3 IEEE Standard VHDL Synthesis Packages