- Verilog-AMS
Verilog-AMS is a derivative of the
hardware description language (HDL)Verilog (IEEE 1364-1995 Verilog HDL). It includes analog and mixed-signal extensions (AMS) in order to define the behavior of analog and mixed-signal systems.The Verilog-AMS standard was created with the intent of enabling designers of analog and mixed signal systems and integrated circuits to create and use modules that encapsulate high-level behavioral descriptions as well as structural descriptions of systems and components [1,2,3] .
Verilog-AMS is an industry standard modeling language for mixed signal circuits. It provides both continuous-time and event-driven modeling semantics, and so is suitable for analog, digital, and mixed analog/digital circuits. It is particularly well suited for verification of very complex analog, mixed-signal and RF integrated circuits [4] .
It must be noted that Verilog is NOT a programming language. It is a hardware description language.
ee also
*
Verilog
*Verilog-A
* VHDLReferences
* [1] Accellera Verilog Analog Mixed-Signal Group, "Overview," http://www.verilog.org/verilog-ams/htmlpages/overview.html.
* [2] [http://www.eda-stds.org/verilog-ams/htmlpages/lit.html Verilog-AMS Language Reference Manual]
* [3] [http://www.designers-guide.org/Books/dg-vams/index.html The Designer's Guide to Verilog-AMS]
* [4] [http://www.designers-guide.com/docs/cicc06-dgc.pdf Verification of Complex Analog Integrated Circuits]
* [] I. Miller and T. Cassagnes, "Verilog-AMS Eases Mixed Mode Signal Simulation," "Technical Proceedings of the 2000 International Conference on Modeling and Simulation of Microsystems", pp. 305-308, Available: http://www.nsti.org/publ/MSM2000/T31.01.pdfExternal links
General
* [http://www.verilog.org/verilog-ams/ Accellera Verilog Analog Mixed-Signal Group]
* [http://www.verilog-ams.com verilog-ams.com]
* [http://www.designers-guide.org/VerilogAMS/ The Designer's Guide Community, Verilog-A/MS] — Examples of models written in Verilog-AMS
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