MESI protocol

MESI protocol

The MESI protocol (known also as "Illinois protocol") is a widely used cache coherency and memory coherence protocol. It is the most common protocol which supports write-back cache. Its use in personal computers became widespread with the introduction of Intel's Pentium processor to "support the more efficient write-back cache in addition to the write-through cache previously used by the Intel 486 processor" [IA-32 Intel Architecture Software Developers Manual] .

States

Every cache line is marked with one of the four following states (coded in two additional bits):

;Modifed: The cache line is present only in the current cache, and is "dirty"; it has been modified from the value in main memory. The cache is required to write the data back to main memory at some time in the future, before permitting any other read of the (no longer valid) main memory state.;Exclusive: The cache line is present only in the current cache, but is "clean"; it matches main memory.;Shared: Indicates that this cache line may be stored in other caches of the machine & is "clean" ; it matches the main memory.;Invalid: Indicates that this cache line is invalid.

Operation

In a typical system, several caches share a common bus to main memory. Each also has an attached CPU which issues read and write requests. The caches' collective goal is to minimize the use of the shared main memory.

A cache may satisfy a read from any state except Invalid. An Invalid line must be fetched (to the Shared or Exclusive states) to satisfy a read.

A write may only be performed if the cache line is in the Modified or Exclusive state. If it is in the Shared state, all other cached copies must be invalidated first. This is typically done by a broadcast operation known as "Read For Ownership (RFO)".

A cache may discard a non-Modified line at any time, changing to the Invalid state. A Modified line must be written back first.

A cache that holds a line in the Modified state must "snoop" (intercept) all attempted reads (from all of the other caches in the system) of the corresponding main memory location and insert the data that it holds. This is typically done by forcing the read to "back off" (i.e. retry later), then writing the data to main memory and changing the cache line to the Shared state.

A cache that holds a line in the Shared state must listen for invalidate or read-for-ownership broadcasts from other caches, and discard the line (by moving it into Invalid state) on a match.

A cache that holds a line in the Exclusive state must also snoop all read transactions from all other caches, and move the line to Shared state on a match.

The Modified and Exclusive states are always precise: i.e. they match the true cache line ownership situation in the system. The Shared state may be imprecise: if another cache discards a Shared line, this cache may become the sole owner of that cache line, but it will not be promoted to Exclusive state. Other caches do not broadcast notices when they discard cache lines, and this cache could not use such notifications without maintaining a count of the number of shared copies.

In that sense the Exclusive state is an opportunistic optimization: If the CPU wants to modify a cache line that is in state S, a bus transaction is necessary to invalidate all other cached copies. State E enables modifying a cache line with no bus transaction.

Read For Ownership

A "Read For Ownership (RFO)" is an operation in cache coherency protocols that combines a read and an invalidate broadcast. The operation is issued by a processor trying to write into a cache line that is not exclusive or not modified to itself, i.e., that is in the shared (S) or invalid (I) states of the MESI protocol. The operation causes all other processors to set the state of such line to I.

ee also

*Coherence protocol
*MSI protocol, the basic protocol from which the MESI protocol is derived.
*Write-once (cache coherency), an early form of the MESI protocol.
*MOSI protocol
*MOESI protocol

References

External links

* [https://www.cs.tcd.ie/Jeremy.Jones/vivio/caches/MESIHelp.htm An interactive MESI simulation]


Wikimedia Foundation. 2010.

Игры ⚽ Поможем решить контрольную работу

Look at other dictionaries:

  • Mesi — may refer to: the MESI protocol Mesi, Naxos, a village on the island of Naxos, Greece This disambiguation page lists articles associated with the same title. If an internal link led you here, you may wish to change the …   Wikipedia

  • MESI — Protocole MESI Le protocole MESI (Modified Exclusive, Shared, Invalid, aussi connu sous le nom d Illinois protocol) est un protocole de cohérence de cache utilisé dans les systèmes multiprocesseur. Chaque ligne du cache est estampillée avec l une …   Wikipédia en Français

  • MESI — abbr. Modified Exclusive Shared Invalid (SMP) comp. abbr. Modified, Exclusive, Shared and Invalid (protocol) …   United dictionary of abbreviations and acronyms

  • MSI protocol — The MSI protocol is a basic cache coherence protocol that is used in multiprocessor systems. As with other cache coherency protocols, the letters of the protocol name identify the possible states in which a cache line can be. So, for MSI, each… …   Wikipedia

  • Firefly protocol — The Firefly cache coherence protocol is the schema used in the DEC Firefly multiprocessor workstation, developed by DEC Systems Research Center. This protocol uses a write through policy. States In this protocol, the following states can be… …   Wikipedia

  • MOESI protocol — This is a full cache coherency protocol that encompasses all of the possible states commonly used in other protocols. As discussed in AMD64 Architecture Programmer s Manual Vol 2 System Programming [ [http://www.amd.com/us en/assets/content… …   Wikipedia

  • Coherence protocol — In computer science, a coherence protocol is a protocol which maintains the consistency between all the caches in a system of distributed shared memory; the protocol maintains memory coherence according to a specified consistency model.Examples… …   Wikipedia

  • MOSI protocol — The MOSI protocol is an extension of the basic MSI cache coherency protocol. It adds the Owned state, which indicates that the current processor owns this block, and will service requests from other processors for the block.ee also*Coherence… …   Wikipedia

  • Protocole MESI — Le protocole MESI (Modified Exclusive, Shared, Invalid, aussi connu sous le nom d Illinois protocol) est un protocole de cohérence de cache utilisé dans les systèmes multiprocesseur. Chaque ligne du cache est estampillée avec l une des marques… …   Wikipédia en Français

  • Write-once (cache coherency) — In cache coherency protocol literature, Write Once is the first write invalidate protocol defined. It has the optimization of executing write update on the first write and a write invalidate on all subsequent writes, reducing the overall bus… …   Wikipedia

Share the article and excerpts

Direct link
Do a right-click on the link above
and select “Copy Link”